2017: Tool And Methodology Shifts


As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is no longer the mobile phone industry that is defining the direction, but automotive and the Internet of Things (IoT). Both of these markets have very different requirements and each creates their o... » read more

The Week In Review: Design


Legal Back in 2013, Synopsys filed suit against ATopTech for copyright infringement. The courts found in favor of Synopsys and ATopTech was damages were set at a little over $30M. With appeals unsuccessful, ATopTech announced that it has filed a voluntary petition under Chapter 11 of the Bankruptcy Code and has filed a motion to sell its businesses using a stalking horse bidder (an initial b... » read more

The Week In Review: Design


M&A ARM reached further into the HPC space with its acquisition of Allinea Software, a provider of debug and performance analysis tools for HPC systems. Currently, 80% of the world's top 25 supercomputers use Allinea's tools, and ARM will continue supporting multiple processor architectures. Terms of the deal were not disclosed. PLDA Group is spinning out its QuickPlay C/C++ tool for ... » read more

The Week In Review: Design


Numbers EDA and IP sales increased 5.6% in Q2 to $2.013 billion, up from $1.907 billion in the same period in 2015, according to the most recent Electronic System Design Alliance numbers. Asia/Pacific revenue increased 10.9% to $608.1 million; Japan increased 15.7% to $211.4 million. The Americas increased 4.4% to $908.4 million. IP Cadence launched the latest generation of its Xtensa ... » read more

The Week In Review: Design


Mergers & Acquisitions Synopsys made a couple of announcements this week related to its TCAD business. First, they acquired Gold Standard Simulations, which clearly became a major factor in the release of a pre-wafer simulation solution to help semiconductor manufacturers reduce process node development time. The new solution aims to provide a comprehensive process, transistor and circui... » read more

The Week In Review: Design/IoT


Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more