tag: FDSOI

Manufacturing Bits: Sept. 23
By Mark LaPedus - 23 Sep, 2014 - Comments: 0

The annual IEEE International Electron Devices Meeting (IEDM) will take place in San Francisco from Dec. 15-17. As usual, there will be presentations on the latest technologies in a number of fields, such as semiconductors, bio‐sensors, energy harvesting, power devices, sensors, magnetics, spintronics, two-dimensional electronics, among others. Here’s just some of the papers that will be pr... » read more

Has The IC Industry Hit A ‘Red Brick Wall’?
By Mark LaPedus - 19 Jun, 2014 - Comments: 2

In the mid-1980s, the semiconductor industry was in a crisis. Chipmakers were looking for ways to break the magical one-micron barrier. Many thought X-ray lithography would be required to break the barrier, but as it turned out, traditional optical technology did the trick. And the industry marched on. Then, in 2000 or so, the IC industry was nearing the so-called “red brick wall,” which... » read more

The Search For The Next Transistor
By Mark LaPedus - 20 Feb, 2014 - Comments: 3

In the near term, the leading-edge chip roadmap looks fairly clear. Chips based on today’s finFETs and planar fully depleted silicon-on-insulator (FDSOI) technologies are expected to scale down to the 10nm node. But then, the CMOS roadmap becomes foggy at 7nm and beyond. The industry has been exploring a number of next-generation transistor candidates, but suddenly, a few technologies are ... » read more

Fab Tool Industry Has Lost Its Way
By Mark LaPedus - 23 Jan, 2014 - Comments: 1

The relationship between chipmakers and fab tool vendors has always been a bit rocky, but the supply chain has generally worked. Chipmakers demand a tool for a particular application. Then, tool makers attempt to deliver the goods, and ask few, if any, questions. Now, fab tool executives are beginning to ask some tough questions about the industry. And the tension is mounting between equ... » read more

The Week In Review: Manufacturing And Design
By Mark LaPedus - 10 Jan, 2014 - Comments: 1

Crucial.com reveals a surprising way to gain more time for improving one's personal health: fix a slow computer. A nationwide survey revealed that U.S. adults think they waste an average of 16 minutes per day waiting for their computer to load or boot up. Equating to two hours each week and four days per year lost to the wiles of a slow computer, it's no surprise that 66% of Americans say that ... » read more

Manufacturing Bits: Dec. 17
By Mark LaPedus - 17 Dec, 2013 - Comments: 0

Implantable TFETs At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., a number of companies, R&D organizations and universities described new breakthroughs in perhaps the next big thing in semiconductors--the tunnel field-effect transistor (TFET). Aimed for the 5nm node, TFETs are steep sub-threshold slope transistors that can scale the supply voltages bel... » read more

Leti Outlines FDSOI And Monolithic 3D IC Roadmaps
By Mark LaPedus - 14 Nov, 2013 - Comments: 0

Semiconductor Engineering discussed the future roadmaps for fully depleted silicon-on-insulator (FDSOI) technology and monolithic 3D chips with Maud Vinet, manager for the Innovative Devices Laboratory at CEA-Leti. SE: What are some of the technologies being developed at the Innovative Devices Laboratory? Vinet: The Innovative Devices Laboratory is involved with advanced CMOS. So basically... » read more

What’s After 10nm?
By Mark LaPedus - 14 Nov, 2013 - Comments: 0

For some time, chipmakers have roughly doubled the transistor count at each node, while simultaneously cutting the cost by around 29%. IC scaling, in turn, enables faster and lower cost chips, which ultimately translates into cheaper electronic products with more functions. Consumers have grown accustomed to the benefits of Moore’s Law, but the question is for how much longer? Chips based ... » read more

Momentum Builds For Monolithic 3D ICs
By Mark LaPedus - 14 Nov, 2013 - Comments: 1

The 2.5D/3D chip market is heating up on several fronts. On one front, stacked-die using through-silicon vias (TSVs) is taking root. In a separate area, Samsung is sampling the world’s first 3D NAND device, with Micron and SK Hynix expected to follow suit. And now, there is another technology generating steam—monolithic 3D integrated circuits. In stacked-die, bare die are connected using... » read more

The Week In Review: Manufacturing & Design
By Mark LaPedus - 01 Nov, 2013 - Comments: 0

Silver surfers represent a more important technology market than “Generation X” and “Generation Y,” according to research from Gartner. Silver surfers are people in middle age or approaching old age. Although most technologists fail to recognize this fact, they are very interested in using technology and also have the time and the resources to pursue their interests, according to Gartne... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy