Inside FD-SOI And Scaling


Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], sat down with Semiconductor Engineering to discuss FD-SOI, IC scaling, process technology and other topics. What follows are excerpts of that conversation. SE: In logic, GlobalFoundries is shipping 14nm finFETs with 7nm in the works. The company is also readying 22nm FD-SOI technology with 12nm FD-SOI ... » read more

What’s Next In Scaling, Stacking


An Steegen, executive vice president of semiconductor technology and systems at [getentity id="22217" e_name="Imec"], sat down with Semiconductor Engineering to discuss IC scaling, chip stacking, packaging and other topics. Imec is an R&D organization in Belgium. What follows are excerpts of that conversation. SE: Chipmakers are shipping 16nm/14nm processes with 10nm and 7nm technologies... » read more

The Race To 10/7nm


Amid the ongoing ramp of 16/14nm processes in the market, the industry is now gearing up for the next nodes. In fact, GlobalFoundries, Intel, Samsung and TSMC are racing each other to ship 10nm and/or 7nm technologies. The current iterations of 10nm and 7nm technologies are scaled versions of today’s 16nm/14nm finFETs with traditional copper interconnects, high-k/metal-gate and low-k diele... » read more

Power Challenges At 10nm And Below


Current density is becoming much more problematic at 10nm and beyond, increasing the amount of power management that needs to be incorporated into each chip and boosting both design costs and time to market. Current per unit of area has been rising since 90nm, forcing design teams to leverage a number of power-related strategies such as [getkc id="143" kc_name="dynamic voltage and frequency... » read more

Historic FinFET/2.5D Firsts


Recently, I had an opportunity to watch the Academy Award nominated movie “Hidden Figures.” If you’re a geek at heart, you need to see this movie. It chronicles the strong contributions of three black women to the NASA space program during the 1960s. The civil rights backstory of the movie is powerful, but there is another aspect of the movie that stayed with me as well: all of the “fir... » read more

22nm Process War Begins


Many foundry customers at the 28nm node and above are developing new chips and are exploring the idea of migrating to 16nm/14nm and beyond. But for the most part, those companies are stuck because they can’t afford the soaring IC design costs at advanced nodes. Seeking to satisfy a potential gap in the market, [getentity id="22819" comment="GlobalFoundries"], [getentity id="22846" e_name="... » read more

The Evolution Of EUV


EUV systems are beginning to ship to large foundries in volume, setting the stage for one of the biggest leaps in technology the semiconductor industry has ever witnessed. ASML has emerged as the sole supplier in this market, but it has taken an entire ecosystem to develop EUV. It has taken billions of dollars of investment by ASML, along with enormous cash infusions by Intel and TSMC, contr... » read more

Will Self-Heating Stop FinFETs


New transistor designs and new materials don’t appear out of thin air. Their adoption always is driven by the limitations of the incumbent technology. Silicon germanium and other compound semiconductors are interesting because they promise superior carrier mobility relative to silicon. [getkc id="185" kc_name="FinFET"] transistor designs help minimize short channel effects, a critical limi... » read more

The Hunt For A Low-Power PHY


Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

Managing Voltage Drop At 10/7nm


Power integrity is becoming a bigger problem at 10/7nm because existing tools such as static analysis no longer are sufficient. Power integrity is a function of static and dynamic voltage drop in the power delivery network. And until recently, static analysis did an effective job in measuring the overall robustness of PDN connectivity. As such, it is a proxy for PDN strength. The problem is ... » read more

← Older posts