The Week In Review: Design


Tools Cadence unveiled an integrated memory design and verification tool, with environments for bitcell design, array and complier verification, and memory characterization. It utilizes existing simulation databases for multi-corner and Monte Carlo analysis, which the company says can lead to a 2X runtime improvement. Solido Design Automation uncorked PVTMC Verifier, which uses machine lear... » read more

A Chip For All Seasons


FPGAs are showing up in more designs and in more markets, and as they get included in more systems they are becoming much more complex. A decade ago, the key markets for [gettech id="31071" t_name="FPGAs"] were industrial, medical, automotive and aerospace. Those markets remain strong, but FPGAs also are playing a role in artificial intelligence, data centers, the [getkc id="76" kc_name="... » read more

The Limits Of IP Reuse


The basic business proposition for third-party IP is that it's cheaper, faster, and less problematic to buy rather than build. But things haven't exactly worked out according to plan, either for companies that license IP or those that develop it. For [getkc id="43" kc_name="IP"] licensees, just keeping track of an endless series of updates is becoming unwieldy. Complex designs often include ... » read more

IP Challenges Ahead


The revenue from semiconductor [getkc id="43" kc_name="IP"] has risen steadily to become the largest segment of the EDA industry. Industry forecasts expect it to keep growing at a CAGR of more than 10% for the next decade. Part one of this article examined the possibility those forecasts are wrong and that large semiconductor companies are likely to start bringing IP development back in hous... » read more

The Secret Life Of Accelerators


Accelerator chips increasingly are providing the performance boost that device scaling once provided, changing basic assumptions about how data moves within an electronic system and where it should be processed. To the outside world, little appears to have changed. But beneath the glossy exterior, and almost always hidden from view, accelerator chips are becoming an integral part of most des... » read more

Is The IP Industry Healthy?


The semiconductor industry has been through many changes, each designed to reduce the total cost associated with the design and manufacture of chips. Twenty years ago, most companies had their own fabs and designed all of the circuitry on each chip. Today, only a handful of companies still own a fab and outsourcing design, in the form of intellectual property ([getkc id="43" kc_name="IP"]), has... » read more

Hardware/Software Tipping Point


It doesn't matter if you believe [getkc id="74" comment="Moore's Law"] has ended or is just slowing down. It is becoming very clear that design in the future will be significant different than it is today. Moore's law allowed the semiconductor industry to reuse design blocks from previous designs, and these were helped along by a new technology nodeā€”even if it was a sub-optimal solution. I... » read more

The Week In Review: Design


Tools OneSpin revealed new formal applications focused on random fault verification for safety critical analysis in automotive and other mission-critical applications. The Fault Injection App provides controlled injection of faults and assertion mapping to associated fault scenarios, as well as visibility into corrupted design behavior. The Fault Detection App allows the detection of dangerous... » read more

The Week In Review: Design


Tools Synopsys debuted a tool to replay RTL simulation data on a gate-level netlist for power analysis the company says is accurate within 5% of signoff. The tool, PowerReplay, is design to be used in combination with PrimeTime PX gate-level power analysis for earlier and faster generation of gate-level switching data. IP ClioSoft launched a design reuse ecosystem for searching and com... » read more

The Week In Review: Design


IP Rambus unveiled High Bandwidth Memory (HBM) Gen2 PHY developed for GlobalFoundries' FX-14 ASIC platform. The PHY, targeted at networking and data center applications, is fully compliant with the JEDEC HBM2 standard and supports data rates up to 2000 Mbps per data pin, for a total bandwidth of 256 GB/s. Omnitek launched a number of new FPGA-based video IPs, including HDMI2.0 Tx and Rx, ... » read more

← Older posts