Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will be jointly owned by Tata and Taiwan's Powerchip. The second fab will be a joint investment between CG Power, Japan's Renesas Electronics, and Thailand's Stars Microelectronics. Tata will run t... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Enabling Test Strategies For 2.5D, 3D Stacked ICs


Improved testability, coupled with more tests at more insertion points, are emerging as key strategies for creating reliable, heterogeneous 2.5D and 3D designs with sufficient yield.  Many changes need to fall into place to make side-by-side 2.5D and 3D stacking approaches cost-effective, particularly for companies looking to integrate chiplets from different vendors. Today, nearly all of t... » read more

Week In Review: Design, Low Power


EnSilica listed on the London Stock Exchange's AIM market under the ticker ENSI. EnSilica designs mixed signal ASICs for system developers in the automotive, industrial, healthcare, and communications markets. It also has a portfolio of core IP covering cryptography, radar and communications systems. AIM is the LSE’s market for small and medium sized growth companies. "In connection with Admi... » read more

Week In Review: Auto, Security, Pervasive Computing


From pandemic to war — some of the news this week highlights reactions to Russia’s invasion of Ukraine. Pervasive computing, IoT, 5G and beyond SpaceX sent Starlink satellite dishes to Ukraine to enable Ukrainian access to the Internet. The caveat is the uplink signals from satellite equipment can be used to triangulate the position of the dish, which can then be hit by missile. The dis... » read more

Week In Review: Manufacturing, Test


Chipmakers Chip investments in Malaysia got a shot in the arm this week. First, Intel has announced plans to invest more than RM30 billion, or US$7 billion, within its Malaysian packaging and test facilities. The additional investment will help expand Intel Malaysia’s operations across Penang and Kulim. This new investment is expected to create over 4,000 Intel jobs as well as over 5,000 con... » read more

The Search For 5G mmWave Filters


Cellular telephone technology takes advantage of a large number of frequency bands to provide ever-increasing bandwidth for mobile use. Each of those bands needs a filter to keep its signals separate from other bands, but the filter technologies in current use for cellphones may not scale up to the full millimeter-wave (mmWave) range planned for 5G. “MmWave will happen,” said Mike Eddy, ... » read more

Designing Chips For Test Data


Collecting data to determine the health of a chip throughout its lifecycle is becoming necessary as chips are used in more critical applications, but being able to access that data isn't always so simple. It requires moving signals through a complex, sometimes unpredictable, and often hostile environment, which is a daunting challenge under the best of conditions. There is a growing sense of... » read more

Why Wafer Bumps Are Suddenly So Important


Wafer bumps need to be uniform in height to facilitate subsequent manufacturing steps, but a push for 100% inspection in packaging in mission-critical markets is putting a strain on existing measurement technologies. Bump co-planarity is essentially a measure of flatness. Specifically, it measures the variation in bump height, which may have a target, for example, of about 100 microns. As a ... » read more

Characterization Of Micro-Bumps For 3DIC Wafer Acceptance Tests


The strong market needs to embed multiple functionalities from different semiconductor processing technologies into a single system continue to drive demands for more advanced 3DIC packaging technologies. Dimensions of copper pillar micro-bumps are consistently reduced in every new technology node to facilitate the 3D stacking of multiple dies so that overall system performance can be improved.... » read more

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