The Next Phase Of Machine Learning


Machine learning is all about doing complex calculations on huge volumes of data with increasing efficiency, and with a growing stockpile of success stories it has rapidly evolved from a rather obscure computer science concept into the go-to method for everything from facial recognition technology to autonomous cars. [getkc id="305" kc_name="Machine learning"] can apply to every corporate fu... » read more

The Case For Combining CPUs With FPGA Fabrics


Given that the industry is beginning to reach the limits of what can physically and economically be achieved through further shrinkage of process geometries, reducing feature size and increasing transistor counts is no longer achieving the same result it once did. Instead the industry is, quite rightly, focusing on fundamentally new system architectures and making better use of available silico... » read more

New Interconnect Makes eFPGA Dense And Portable


FPGAs were invented over 30 years ago. Today they are much bigger and faster, but their basic architecture remains unchanged: logic blocks formed around LUTs (look-up-tables) in a sea of mesh (x/y grid) interconnect with a matrix of switches at every “intersection.” One FPGA company executive once said they don’t really sell programmable logic, they sell programmable interconnect, beca... » read more

Making Machine Learning Portable


Machine learning is everywhere, and it has exploded at a pace no one would have expected. Even a year ago, ML was more of an experiment than a reality. NVIDIA's stock price (Fig. 1, below) is a good representation of just how quickly this market has grown. GPUs are the chip of choice for training machine learning systems. Fig. 1: Nvidia 5-year stock price. Source: Google Finance Ma... » read more

Move Data Or Process In Place?


Should data move to available processors or should processors be placed close to memory? That is a question the academic community has been looking at for decades. Moving data is one of the most expensive and power-consuming tasks, and is often the limiter to system performance. Within a chip, Moore's Law has enabled designers to physically move memory closer to processing, and that has rema... » read more

Toward System-Level Test


The push toward more complex integration in chips, advanced packaging, and the use of those chips for new applications is turning the test world upside down. Most people think of test as a single operation that is performed during manufacturing. In reality it is a portfolio of separate operations, and the number of tests required is growing as designs become more heterogeneous and as they ar... » read more

Tech Talk: eFPGA Verification


Chris Pelosi, vice president of hardware engineering at Achronix, explains how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs. https://youtu.be/UBLNabLUg9I Related Stories Tech Talk: EFPGA Test How to plan for sufficient coverage for an embedded FPGA and how much it will cost. Embedded FPGAs Going Mainstream? Programmable devices are be... » read more

A Chip For All Seasons


FPGAs are showing up in more designs and in more markets, and as they get included in more systems they are becoming much more complex. A decade ago, the key markets for [gettech id="31071" t_name="FPGAs"] were industrial, medical, automotive and aerospace. Those markets remain strong, but FPGAs also are playing a role in artificial intelligence, data centers, the [getkc id="76" kc_name="... » read more

CCIX Enables Machine Learning


It takes a lot of technology to enable something like machine learning, and not all of it is as glamorous as neural network architectures and algorithms. Several levels below that is the actual hardware on which these run, and that brings us into the even less sexy world of interfaces. One such interface, the Cache Coherent Interconnect for Accelerators (CCIX), pronounced C6, aims to make th... » read more

Age Of Acceleration


A shift from the fastest processors to accelerating specific functions is underway, supplanting an era of dark silicon in which one or more processor cores remain in a ready state whenever a single core's performance bogs down. In effect, the dark silicon/multi-core approach is being scrapped for many functions in favor of an accelerator-based microarchitecture that is far more granular. The... » read more

← Older posts