Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing


How Advantest Corporation, ASML, Fraunhofer, imec, Siemens EDA and others are using deep learning in semiconductor manufacturing. Click here to read more. » read more

Architecting Chips For High-Performance Computing


The world’s leading hyperscaler cloud data center companies — Amazon, Google, Meta, Microsoft, Oracle, and Akamai — are launching heterogeneous, multi-core architectures specifically for the cloud, and the impact is being felt in high-performance CPU development across the chip industry. It's unlikely that any these chips will ever be sold commercially. They are optimized for specific ... » read more

Chip Industry Talent Shortage Drives Academic Partnerships


Universities around the world are forming partnerships with semiconductor companies and governments to help fill open and future positions, to keep curricula current and relevant, and to update and expand skills for working engineers. Talent shortages repeatedly have been cited as the number one challenge for the chip industry. Behind those concerns are several key drivers, and many more dom... » read more

Chip Industry Week In Review


By Liz Allan, Jesse Allen, and Karen Heyman Global semiconductor equipment billings dipped 2% year-over-year to US$25.8 billion in Q2, and slipped 4% compared with Q1, according to SEMI. Similarly, the top 10 semiconductor foundries reported a 1.1% quarterly-over-quarter revenue decline in Q2. A rebound is anticipated in Q3, according to TrendForce. Synopsys extended its AI-driven EDA ... » read more

Large-Scale Integration’s Future Depends On Modeling


VLSI is a term that conjures up images of a college textbook, but some of the concepts included in very large-scale integration remain relevant and continue to evolve, while others have fallen by the wayside. The portion of VLSI that remains most relevant for semiconductor industry is "integration," which is pushing well beyond the edges of a monolithic planar chip. But that expansion also i... » read more

Covert Channel Between the CPU and An FPGA By Modulating The Usage of the Power Distribution Network


A new technical paper titled "CPU to FPGA Power Covert Channel in FPGA-SoCs" was published by researchers at TU Munich and Fraunhofer Research Institution AISEC. Abstract: "FPGA-SoCs are a popular platform for accelerating a wide range of applications due to their performance and flexibility. From a security point of view, these systems have been shown to be vulnerable to various attacks... » read more

Research Bits: Feb. 28


Single-molecule switch An international team of researchers have demonstrated a switch on a single fullerene molecule. Using a laser, the team switched the path of an incoming electron. “What we’ve managed to do here is control the way a molecule directs the path of an incoming electron using a very short pulse of red laser light,” said Project Researcher Hirofumi Yanagisawa from the Uni... » read more

Chip Industry’s Technical Paper Roundup: Feb. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=83 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Security-Aware Compiler-Assisted Countermeasure to Mitigate Fault Attacks on RISC-V


A new technical paper titled "CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V" was published by researchers at TU Munich and Fraunhofer Institute for Applied and Integrated Security (AISEC). Abstract "Fault-injection attacks are a risk for any computing system executing security-relevant tasks, such as a secure boot process. While ha... » read more

Fabricating FeFET Devices with Silicon-Doped Hafnium Oxide As A Ferroelectric Layer


A new technical paper titled "Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications" was published by researchers at Fraunhofer IPMS, GlobalFoundries, and TU Bergakademie Freiberg. Abstract (partial) "This article reports an improvement in the performance of the hafnium oxide-based (HfO2) ferroelectric... » read more

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