tag: Industrial Technology Research Institute

Study Of Bondable Laser Release Material Using 355nm Energy To Facilitate RDL-First And Die-First Fan-Out Wafer-Level Packaging (FOWLP)
By Brewer Science - 18 May, 2022 - Comments: 0

A thorough evaluation on selecting a bondable laser release material for redistribution layer (RDL)-first and die-first fan-out wafer-level packaging (FOWLP) is presented in this article. Four laser release materials were identified based on their absorption coefficient at 355 nm. In addition, all four of these materials possess thermal stability above 350 °C and pull-off adhesion on a Ti/Cu l... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Mar, 2022 - Comments: 0

Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Sep, 2021 - Comments: 0

MoSys, a provider of SRAM solutions and networking accelerators, and Peraso Technologies, a provider of 5G mmWave devices, are merging. Stockholders of Peraso are expected to hold a 61% equity interest in the combined company, with the remaining 39% equity interest to be retained by the stockholders of MoSys. Peraso CEO Ronald Glibbery said, "By joining with MoSys, we believe we can deliver a b... » read more

Manufacturing Bits: June 4
By Mark LaPedus - 04 Jun, 2019 - Comments: 0

Chiplet printer A number of companies, R&D organizations and universities separately presented a slew of papers and technologies at the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas. It’s difficult to write about all of the papers at ECTC. But one paper that stood out is a prototype chiplet micro-assembly printer developed by the Palo Alto Research Cente... » read more

Sorting Out Packaging Options
By Ed Sperling - 10 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss advanced packaging with David Butler, executive vice president and general manager of SPTS Technologies; Ingu Yin Chang, senior vice president president at ASE Group; Hubert Karl Lakner, executive director of the Fraunhofer Institute for Photonic Microsystems; Robert Lo, division director for electronics and optoelectronics research at Industrial Te... » read more

The Week In Review: Design
By Jesse Allen - 10 Nov, 2017 - Comments: 0

IP Cryptographic flaws have been discovered in the IEEE P1735 standard for encrypting IP and managing access rights. A team from the University of Florida found "a surprising number of cryptographic mistakes in the standard. In the most egregious cases, these mistakes enable attack vectors that allow us to recover the entire underlying plaintext IP." The researchers warn that an adversary coul... » read more

What’s Next In Mobile Displays
By Mark LaPedus - 17 Dec, 2015 - Comments: 0

The next wave of smartphones and wearables is invading the market. These systems will feature a new class of high-resolution displays, and in the near future displays will become foldable and rollable, although there are still some challenges with this technology. To be sure, mobile display technology is advancing on several fronts. On one front, for example, Apple and other systems vendor... » read more

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