STMicroelectronics’ Implementation Of The STAR Hierarchical System And IEEE 1500 Wrapping


This white paper discusses various IEEE 1500 architectures that STMicroelectronics has deployed using the Synopsys DesignWare STAR Hierarchical System test solution. STAR Hierarchical System allows users to optimize test time on system-on-chips that use multiple cores. The white paper provides guidelines on interface IP wrapping with IEEE 1500 to improve test time. In addition, it discusses the... » read more

Which Verification Engine?


Semiconductor Engineering sat down to discuss the state of verification with Jean-Marie Brunet, senior director of marketing for emulation at [getentity id="22017" e_name="Mentor, a Siemens Business"]; Frank Schirrmeister, senior group director for product management at [getentity id="22032" e_name="Cadence"]; Dave Kelf, vice president of marketing at [getentity id="22395" e_name="OneSpin Solut... » read more

Dealing With Deadlocks


Deadlocks are becoming increasingly problematic as designs becoming more complex and heterogeneous. Rather than just integrating IP, the challenge is understanding all of the possible interactions and dependencies. That affects the choice of IP, how it is implemented in a design, and how it is verified. And it adds a whole bunch of unknowns into an already complex formula for return on inves... » read more

Securing High-Value Embedded Targets


Understanding security threats and building solutions to protect against them is a relatively new concept for embedded developers. As an example, many early IoT devices were focused purely on cost. Designers spent very little time architecting robust security solutions. Today, these devices are more involved in users’ daily routines, processing sensitive data such as personal medical informat... » read more

Trimming Waste In Chips


Extra circuitry costs money, reduces performance and increases power consumption. But how much can really be trimmed? When people are asked that question they either get defensive or they see it as an opportunity to show the advantages of their architecture, design process or IP. The same holds true for IP suppliers. Others point out that the whole concept of waste is somewhat strange, becau... » read more

Achieving ISO 26262 Certification With ASIL-Ready IP


According to an article by McKinsey, “analysts predict revenue growth for advanced driver assistance systems (ADAS) to be up to 29 percent, giving the segment one of the highest growth rates in the automotive and related industries.” This opportunity has invigorated the automotive supply chain to increase their R&D investments for faster product innovations. The focus on innovation is e... » read more

Starting Point Is Changing For Designs


The starting point for semiconductor designs is shifting. What used to be a fairly straightforward exercise of choosing a processor based on power or performance, followed by how much on-chip versus off-chip memory is required, has become much more complicated. This is partly due to an emphasis on application-specific hardware and software solutions for markets that either never existed befo... » read more

Developing High-Reliability Reprogrammable NVM IP for Automotive Application


To help IC designers understand the complexities in developing the highest reliability non-volatile memory (NVM) IP for automotive applications, this white paper will review key considerations from design to test, including: key reliability specifications, designing-in reliability, and demonstrating reliability through characterization, qualification, and reliability testing. This paper helps I... » read more

Generically Reusable IP No One Uses


I can’t tell you how many times this line has jumped into my mind over the last couple decades, probably because I lost count sometime in 1998... Manager: “...why do they put a guarantee on the box then?” Tommy: “‘Cause they know all they sold you was a guaranteed piece of s***.” That’s an exchange from the movie Tommy Boy, a classic from my university days. Tommy Callaha... » read more

Efficient Verification Of Mixed-Signal SerDes IP Using UVM


Interface IP is an integral part of systems-on-chips (SoC) that include mobile, automotive, or networking applications and are primarily used for transmitting data over a physical medium between a host and device. The mixed-signal nature of the IP makes verification a challenging task, requiring special considerations for digital and analog sections. This paper describes a robust mixed-signal v... » read more

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