Saving Power In A UFS Implementation Leveraging MIPI M-PHY And UniPro


The JEDEC Universal Flash Storage (UFS) has become the mobile storage standard of choice for today’s high-end smartphones and tablets mainly due to the specification’s performance and power advantages over other existing solutions. These advantages become critical to meet end users’ requirements for higher responsiveness and increased capabilities. For example, end users expect to transmi... » read more

The Hunt For A Low-Power PHY


Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

The Week In Review: Manufacturing


Chipmakers At an event, Intel’s Technology and Manufacturing group outlined the company's vision. As part of the event, Intel reiterated what many are saying—the current node designations are meaningless and misleading. “For example, Intel estimates that its 14nm solution that has been out in the market since 2014 should be equal to 10nm solutions released by competitors in the near futu... » read more

The Week In Review: Design


SoftBank plans to sell a 25% stake in ARM to Vision Fund, a $100 billion technology fund created last year by SoftBank and Saudi Arabia's Public Investment Fund. SoftBank and Saudi Arabia are investing $25 billion and $45 billion in the fund, respectively. Another potential major player is Mubadala Development Co., the government-owned Abu Dhabi investment firm which owns GlobalFoundries and, a... » read more

Changes In China


By Jesse Zhang, SEMI China Industry leaders gathered in Beijing at BIMS 2016 — the Beijing International Microelectronics Symposium — to discuss growth opportunities for the semiconductor industry and the mobile communications market. The 17th session of BIMS was co-sponsored by SEMI and the Chinese-American Semiconductor Professionals Association (CASPA). For 17 years, BIMS has provi... » read more

Stepping Back From Scaling


Architectures, packaging and software are becoming core areas for semiconductor research and development, setting the stage for a series of shifts that will impact a large swath of the semiconductor industry. While there is still demand from the largest chipmakers for increased density at the next process node, the underlying economics for foundries, equipment vendors and IP developers are f... » read more

It’s All About DRAM


For decades, the starting point for compute architectures was the processor. In the future, it likely will be the DRAM architecture. Dynamic random access memory always has played a big role in computing. Since IBM's Robert Dennard invented DRAM back in 1966, it has become the gold standard for off-chip memory. It's fast, cheap, reliable, and at least until about 20nm, it has scaled quite n... » read more

The Week In Review: Design/IoT


Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more

New Memory Approaches And Issues


New memory types and approaches are being developed and tested as DRAM and Moore's Law both run out of steam, adding greatly to the confusion of what comes next and how that will affect chip designs. What fits where in the memory hierarchy is becoming less clear as the semiconductor industry grapples with these changes. New architectures, such as [getkc id="202" kc_name="fan-outs"] and [getk... » read more

Optimizing LPDDR4 Performance And Power With Multi-Channel Architectures


PDDR4 offers huge bandwidth in a physically small PCB area and volume; up to 25.6 GByte/s of bandwidth at a 3,200 Mbps data rate from a single 15mmx15mm LPDDR4 package when two dies are packaged together. LPDDR4 builds on the success of LPDDR2 and LPDDR3 by adding new features and introducing a major architectural change. This white paper explains how LPDDR4 is different from all previous JEDEC... » read more

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