Got System Cache?

Similar to the world we live in, a coherent SoC system has truly become a hodgepodge of often conflicting desires, wants, and needs. While some traffic flows are highly sensitive to CAS latency, others have rigid coherent bandwidth requirements, and others are more concerned with “must have” real-time needs to fulfill their tasks. Varying vastly from "must haves" to "best-effort," finding t... » read more

Executive Insight: Sehat Sutardja

Sehat Sutardja, chairman and CEO of Marvell, sat down with Semiconductor Engineering to talk about new approaches for design and memory and why costs and time to market are forcing changes in Moore's Law. What follows are excerpts of that conversation. SE: What was behind your move into modular packaging? Sutardja: The cost of building chips is getting out of hand. As we make things more ... » read more