Keeping The Whole Package Cool

Heat dissipation is a critical issue for designers of complex chip-stacking and system-in-package devices. The amount of heat generated by a device increases as the number of transistors goes up, but the ability to dissipate the heat depends on the package surface area. Because the goal of 3D packaging is to squeeze more transistors into less overall space, new heat dissipation issues are em... » read more

Improving Transistor Reliability

One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Engineering For Next-Gen Memory Performance

When only a few electrons mean the difference between the ON and the OFF state, it’s difficult to manufacture [getkc id="22" kc_name="memory"] elements with consistent, reliable performance. This is the situation conventional capacitance-based memories face as critical dimensions drop to just a few nanometers. As a result, device designers are considering a wide range of alternative memory... » read more

The List Of Unknowns Grows After Silicon

As discussed earlier in this series, most proposed alternative channel schemes depend on germanium channels for pMOS transistors, and InGaAs channels for nMOS transistors. Of the two materials, InGaAs poses by far the more difficult integration challenges. Germanium has been present in advanced silicon CMOS fabs for several technology generations, having been introduced used in strained silicon... » read more