AI Architectures Must Change


Using existing architectures for solving machine learning and artificial intelligence problems is becoming impractical. The total energy consumed by AI is rising significantly, and CPUs and GPUs increasingly are looking like the wrong tools for the job. Several roundtables have concluded the best opportunity for significant change happens when there is no legacy IP. Most designs have evolved... » read more

High-Performance Memory At Low Cost Per Bit


Hardware developers of deep learning neural networks (DNN) have a universal complaint – they need more and more memory capacity with high performance, low cost and low power. As artificial intelligence (AI) techniques gain wider adoption, their complexity and training requirements also increase. Large and complex DNN models do not fit on the small on-chip SRAM caches near the processor. This ... » read more

Impact Of IP On AI SoCs


The combination of mathematics and processing capability has set in motion a new generation of technology advancements with an entire new world of possibilities related to Artificial Intelligence. AI mimics human behavior using deep learning algorithms. Neural networks are what we define as deep learning, which is a subset of machine learning, which is yet a subset of AI, as shown in Figure 1. ... » read more

Pros, Cons Of ML-Specific Chips


Semiconductor Engineering sat down with Rob Aitken, an Arm fellow; Raik Brinkmann, CEO of OneSpin Solutions; Patrick Soheili, vice president of business and corporate development at eSilicon; and Chris Rowen, CEO of Babblelabs. What follows are excerpts of that conversation. To view part one, click here. Part two is here. SE: Is the industry's knowledge of machine learning keeping up with th... » read more

Leti’s Next Focus


Emmanuel Sabonnadière, chief executive of Leti, sat down with Semiconductor Engineering to discuss R&D trends, a new deal with Soitec, and the latest developments at the France-based research organization. Leti is a research institute of CEA Tech. What follows are excerpts of that conversation. SE: Leti recently formed an alliance with Soitec. Under the terms, Leti and Soitec are formin... » read more

Embedded FPGA Design Considerations


Geoff Tate, CEO of Flex Logix, talks about interconnects, memory, different design approaches, and why foundry processes are critical to eFPGA design. https://youtu.be/FngrgDnJn9c » read more

Defining Edge Memory Requirements


Defining edge computing memory requirements is a growing problem for chipmakers vying for a piece of this market, because it varies by platform, by application, and even by use case. Edge computing plays a role in artificial intelligence, automotive, IoT, data centers, as well as wearables, and each has significantly different memory requirements. So it's important to have memory requirement... » read more

The Long Pause


Carmakers are leaping over each other to roll out cars that meet SAE Level 3 requirements, whereby under some conditions drivers can let go of the steering wheel. Getting to Level 5 will take a lot longer, and there is some debate about where and even whether Level 4 will ever happen (see Fig. 1). Fig. 1: Levels of autonomy. Source: Auto Alliance There are two big gaps that need to be a... » read more

What’s In A Node?


In an environment where process nodes are no longer consistently delivering the level of improvements predicted by Moore’s Law, the industry will continue to develop “inter-nodes” as a way to deliver incremental improvements in lieu of “full-nodes.” A shift in market requirements, in part due to the rise of AI and IoT, is increasing emphasis on trailing-nodes. When it comes to leading... » read more

Power/Performance Bits: May 22


Sensing without battery power Engineers at the National University of Singapore developed an IoT-focused sensor chip that can continue operating when its battery runs out of energy. The chip, BATLESS, uses a power management technique that allows it to self-start and continue to function under dim light without any battery assistance. The chip can operate in two different modes: minimum-ene... » read more

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