Power/Performance Bits: July 18


Ad hoc "cache hierarchies" Researchers at MIT and Carnegie Mellon University designed a system that reallocates cache access on the fly, to create new "cache hierarchies" tailored to the needs of particular programs. Dubbed Jenga, the system distinguishes between the physical locations of the separate memory banks that make up the shared cache. For each core, Jenga knows how long it would t... » read more

Memory Buffer Chips: Satisfying Amdahl’s Law To Sustain Moore’s Law


Moore’s Law, the observation that the available transistors in an integrated circuit doubles every two years, has driven the semiconductor and IT industries to unparalleled growth over the last 50+ years. These transistors have been used in CPUs to increase the number of parallel execution units and instruction fetches, expand the levels of on-chip cache (and overall capacity), support spe... » read more

The Black Box In Auto Vehicles


Driving a modern car or truck today is like driving a complex computer system which has the scope to take people and freight from one geographic point to another through the infrastructure and, to do so, it just happens it has an engine and wheels. Among the most significant developments in automotive electronics in the last several years is the inclusion of an EDR (Event Data Recorder) in e... » read more

Power/Performance Bits: June 27


Superconducting nanowire memory cell Researchers at the University of Illinois at Urbana-Champaign and the State University of New York at Stony Brook developed a new nanoscale memory cell that provides stable memory at a smaller size than other proposed memory devices, and holds promise for successful integration with superconducting processors. The device comprises two superconducting nan... » read more

Neuromorphic Computing: Modeling The Brain


Can you tell the difference between a pedestrian and a bicycle? How about between a skunk and a black and white cat? Or between your neighbor’s dog and a colt or fawn? Of course you can, and you probably can do that without much conscious thought. Humans are very good at interpreting the world around them, both visually and through other sensory input. Computers are not. Though their sheer... » read more

Power/Performance Bits: June 6


Magnetoelectric RAM A team of researchers from the Institute of Electronics, Microelectronics and Nanotechnology in Lille, France and the Russian Academy of Sciences in Moscow developed a magnetoelectric random access memory (MELRAM) cell that has the potential to increase power efficiency, and thereby decrease heat waste, by orders of magnitude for read operations at room temperature. Th... » read more

1.41 ‘Giga-Searches’ Per Second?


Data centers, which are the engines of the Internet, are responsible for the vast amount of traffic that flows across the network. And, it’s no revelation; our digital universe and data center traffic will reach 10.4 zettabytes (ZB) by 2019, the equivalent to 144 trillion hours of streaming music. As apps and services become more data hungry, the higher the allowance for data traffic we’re... » read more

Performance-IP: Less Memory Latency


The combination of more functionality on chips plus more contention for memories is forcing companies to look at different ways to improve performance. Just adding more processing power doesn't guarantee improved performance, and throwing more memory at a problem—either SRAM or multiple levels of cache—is expensive and not always faster. There are too many processors and too many request... » read more

Inside Lithography And Masks


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="IMEC"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; David Fried, chief technology officer at [getentity id="22210" e_name="Cov... » read more

Why Is TCAM Essential For The Cloud?


With port speeds exceeding 100Gbps, route lookups that are fundamental to all routers have relied on ternary content addressable memories (TCAMs) to provide a lookup response within a clock cycle. However, TCAMs in discrete form are expensive, consume a lot of power, compete for precious real estate on the printed circuit board (PCB), and often lack required flexibility. Embedding a TCAM block ... » read more

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