Next-Gen Power Integrity Challenges


Experts at the Table: Semiconductor Engineering sat down to discuss power integrity challenges and best practices in designs at 7nm and below, and in 2.5D and 3D-IC packages, with Chip Stratakos, partner, physical design at Microsoft; Mohit Jain, principal engineer at Qualcomm; Thomas Quan, director at TSMC; and Murat Becer, vice president at Ansys. What follows are excerpts of that conversatio... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan AMD took the covers off new AI accelerators for training and inferencing of large language model and high-performance computing workloads. In its announcement, AMD focused heavily on performance leadership in the commercial AI processor space through a combination of architectural changes, better software efficiency, along with some improvements in... » read more

Startup Funding: November 2023


November was a banner month for quantum computing startups, with two raising rounds of $100 million for their superconducting and silicon spin qubit technology. Another significant round went to a company developing photonic-based systems. Several other companies drew funding, including one applying quantum sensors to semiconductor inspection. Sizeable funding also went to an autonomous tran... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, and Liz Allan Amkor plans to invest about $2 billion in a new advanced packaging and test facility in Peoria, Arizona. When finished, it will employ about 2,000 people and will be the largest outsourced advanced packaging facility in the U.S. The first phase of the construction is expected to be completed and operational within two to three years. Synopsys p... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan Japan's Rapidus and the University of Tokyo are teaming up with France's Leti to meet its previously announced mass production goal of 2nm chips by 2027, and chips in the 1nm range in the 2030s. Rapidus was formed in 2022 with the support of eight Japanese companies — Sony, Kioxia, Denso, NEC, NTT, SoftBank, Toyota, and Mitsubishi's banking arm, ... » read more

For SDVs, Software Is The Biggest Challenge


Software-defined vehicles (SDVs) involve far more than just OTA applications enabling software upgrades over the air. Software that will manage hundreds of ECUs and other functions within the vehicle is expected to grow beyond hundreds of millions of lines of code, possibly making SDV software development the number one challenge in automotive design. The benefits of SDVs, such as easy updat... » read more

Chip Industry Week In Review


By Susan Rambo, Karen Heyman, and Liz Allan The Biden-Harris administration designated 31 Tech Hubs across the U.S. this week, focused on industries including autonomous systems, quantum computing, biotechnology, precision medicine, clean energy advancement, and semiconductor manufacturing. The Department of Commerce (DOC) also launched its second Tech Hubs Notice of Funding Opportunity. ... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, and Liz Allan SRC unfurled its Microelectronics and Advanced Packaging (MAPT) industry-wide 3D semiconductor roadmap, addressing such topics as advanced packaging, heterogeneous integration, analog and mixed-signal semiconductors, energy efficiency, security, the related foundational ecosystem, and more. The guidance is the collective effort of 300 individuals ... » read more

Chip Industry Week In Review


By Jesse Allen, Liz Allan, and Gregory Haley A potential government shutdown beginning in November would be "massively disruptive" for the Commerce Department as it continues to disburse critical funding featured in the CHIPS Act to boost semiconductor research and development in the U.S., according to Secretary Gina Raimondo. Global semiconductor industry sales totaled $44 billion in Aug... » read more

Chip Industry Week In Review


By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

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