The Week In Review: Design

IP Sonics unveiled Energy Processing Unit (EPU) IP, based on the company's ICE-Grain power architecture, to better manage and control circuit idle time. The IP facilitates design of SoC power architecture and implementation and verification of the resulting power management subsystem. Synopsys debuted ARC SEM security processors with timing and power randomization features to protect agai... » read more

Integration IP Helps IP Integration

You might not know much about the MIPI Alliance if you aren't designing mobile phones, but you will soon. Other application areas are taking interest in what this group has accomplished. The alliance was founded in 2003 to create standards for hardware and software interfaces in mobile devices. Successful examples include a camera serial interface (CSI) and a display serial interface (DSI), ... » read more

The Week In Review: Design

Tools Aldec uncorked its TySOM embedded development kit, which includes Riviera-PRO mixed-HDL language simulation for VHDL 2008/Verilog 2005, a Xilinx Zynq-based development board and pre-validated Ubuntu Embedded Host reference designs and tutorials. Mentor Graphics introduced the first phase of its new Xpedition PCB design flow with technologies for design and verification of rigid and ... » read more

DAC Day Two: Down To Business

DAC day two started with a breakfast presentation put on by Synopsys which included guests from ARM, TSMC and HiSilicon. It was titled Collaborating to Enable Design with the latest processors and finFET processes. Collaboration is a word that we hear increasingly when talking about the advanced nodes and today we are truly at the point where one company cannot do it all. Ron Moore, VP of ma... » read more

The Week In Review: Design/IoT

Tools Aldec introduced Hybrid Emulation including support for ARM Fast Models. Aldec says the capability to link an SoC emulation hardware platform with a virtual platform allows both software and hardware teams to work on the most up-to-date version of the project, long before first silicon is available, or even much of the RTL or IP has been completed. eSilicon's online quoting tools fo... » read more

Think In Blocks

It always seems to come back to LEGOs, doesn’t it? Earlier this year I wrote about Google Project Ara, the so-called “LEGO” smart phone architecture unveiled in April. Project Ara uses the MIPI Alliance UniPro and M-PHY protocols as the backbone for a modular electronics architecture inside a smart phone “endoskeleton.” Using electro-permanent magnets (they don’t need a perma... » read more

The Week In Review: Design/IoT

Deals Arteris teamed up with Yogitech to integrate the two companies' products. They're planning a set of ISO 26262 deliverables for a series of SoC reference designs and a functional safety assessment of the Arteris FlexNoC interconnect IP. ARM and Green Hills Software collaborated on an optimized compiler for the Cortex-R5 processor. The compiler achieved a score of 1.01EEMBC Automarks/... » read more