Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Chip Industry Technical Paper Roundup: Mar. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=201 /] » read more

CMOS-Compatible, On-Chip, Compact And Wideband Nanoacoustic Pass-Band Filters For 5G And 6G


A technical paper titled “Compact and wideband nanoacoustic pass-band filters for future 5G and 6G cellular radios” was published by researchers at Northeastern University. Abstract: "Over recent years, the surge in mobile communication has deepened global connectivity. With escalating demands for faster data rates, the push for higher carrier frequencies intensifies. The 7–20 GHz ran... » read more

Research Bits: Nov. 28


Switchable photodetector and neuromorphic vision sensor Researchers from the Institute of Metal Research at the Chinese Academy of Sciences built a device that can be switched between being a photodetector and neuromorphic vision sensor by adjusting the operating voltage. The trench-bridged GaN/Ga2O3/GaN heterojunction array device exhibits volatile and non-volatile photocurrents at low and hi... » read more

Week In Review: Auto, Security, Pervasive Computing


Intel issued an advisory of a potential security vulnerability in some of its processors. The company recommends updating to the latest firmware version. NVIDIA unveiled its GH200 Grace Hopper platform, based on 144 Arm Neoverse cores and 282GB of HBM3e memory. Meanwhile, Chinese internet companies including Baidu, ByteDance, Tencent, and Alibaba ordered about $5 billion worth of A800 proces... » read more

Week In Review: Design, Low Power


With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an... » read more

Chip Industry’s Technical Paper Roundup: Oct 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Highly Dense And Vertically Aligned Sub-5 nm Silicon Nanowires


A new technical paper titled "Catalyst-free synthesis of sub-5 nm silicon nanowire arrays with massive lattice contraction and wide bandgap" was published by researchers at Northeastern University, Korea Institute of Science and Technology, Gyeongsang National University and others. "Here, we prepare highly dense and vertically aligned sub-5 nm silicon nanowires with length/diameter aspect r... » read more

Week In Review: Design, Low Power


Cadence unveiled a big data analytics infrastructure to unify massive data sets across all Cadence computational software. The Joint Enterprise Data and AI (JedAI) Platform aims to optimize multiple runs of multiple engines across an entire SoC design and verification flow. It combines data from its AI-driven Cerebrus implementation and Optimality system optimization solutions, along with the n... » read more

Technical Paper Round-Up: Aug 23


New technical papers added to Semiconductor Engineering’s library this week. [table id=46 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

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