The Week In Review: Design


Tools Synopsys updated RSoft, its software for the design of photonic devices. The updates include increased integration with the company's TCAD products as well as faster simulations and additional ways to customize photonic device analysis. IP Mentor Graphics, Northwest Logic, and Krivi Semiconductor collaborated on DDR4 SDRAM IP to integrate design and verification into a single flo... » read more

High-Bandwidth Memory


High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. This white paper explains HBM’s value proposition, and how these five companies make... » read more

The Week In Review: Design/IoT


M&A Mentor Graphics acquired the rest of Calypto. In 2011, Mentor sold Calypto their high-level synthesis solution – Catapult – in exchange for 51% of the company, but left it as a fully standalone entity. Calypto will now be merged into Mentor as a standalone business unit. Tools Synopsys released its HAPS-80 FPGA-based prototyping system. According to Synopsys, the system pro... » read more

Architecting For Optimal Interface IP Integration


Semiconductor Engineering sat down to discuss the design and integration of complex interface IP with Ty Garibay, vice president of engineering at [getentity id="22849" e_name="Altera"]; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Saman Sadr, director of analog design... » read more

Architecting For Optimal Interface IP Integration


Semiconductor Engineering sat down to discuss the design and integration of complex interface [getkc id="43" comment="IP"] with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Saman Sadr, director of analog design at Semtech; and Nav... » read more

Architecting For Optimal Interface IP Integration


Semiconductor Engineering sat down to discuss the design and integration of complex interface IP with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at Rambus; Saman Sadr, director of analog design at Semtech; and Navraj Nandra, senior director of marketing for analog/mixed ... » read more

Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

The Week In Review: Design


Partnerships With an aim to drive adoption of software testing in Japan, Coverity, a Synopsys company said it has tapped OGIS-RI, a Japan-based distributor of IT solutions to partner with Coverity's software testing platform and OGIS-RI's open source license and vulnerability management tool. Maxscend Technologies has joined CEVA’s CEVAnet partner program and will offer complete solutio... » read more