Blog Review: March 22


Cadence's Paul McLellan shares TSMC's plans for 5nm and gate-all-around FET, plus other highlights from last week's Technology Symposium. Mentor's Craig Armenti examines how product development teams can increase efficiency through concurrent schematic design. Synopsys' Jim Ivers warns of the data security and privacy issues posed by a wave of popular connected toys. At Embedded World,... » read more

Big Data On Wheels


By Jeff Dorsch & Ed Sperling All kinds of chips are going into driver-assisted and autonomous cars. On one side are arrays of sensors, which are generating huge amounts of data about everything from lane position and proximity to other cars to unexpected objects in the road. On the other side are the chips required to process that data at blazing speed. As the market for PCs and mobil... » read more

Blog Review: March 1


In a video, Mentor's Wally Rhines discusses the evolution of test methodologies and the forces that will change test priorities. Cadence's Priya Balasubramanian explores memory trends in data servers driven by the Internet's massive need for bandwidth. Synopsys' Aadil Trikha presents a primer on the types of AMBA ACE barrier transactions. ARM's Simon Segars examines the state of IoT de... » read more

Blog Review: Feb. 22


Mentor's Brian Derrick digs into the state of the electric vehicle industry and whether established OEMs will be able to make the changes required to meet new consumer demands. Cadence's Paul McLellan listens in on how to greatly improve the efficiency of machine learning, without using custom hardware, in a talk by Stanford's Kunle Olukotun. Synopsys' Robert Vamosi warns not to overlook ... » read more

Blog Review: Feb. 15


Mentor's Jean-Marie Brunet looks at factors driving the growth of hardware emulation for SoCs. Cadence's Dave Pursley asserts that the role of hardware developers is about to change for the better. Synopsys' Robert Vamosi says that major software vulnerabilities are becoming less frequent, in spite of hype surrounding named bugs. ARM's Rhonda Dirvin discusses the release of the OpenFog... » read more

Betting On Wafer-Level Fan-Outs


Advanced packaging is starting to gain traction as a commercially viable business model rather than just one more possible option, propelled by the technical difficulties in routing signals at 10nm and 7nm and skyrocketing costs of device scaling on a single die. The inclusion of a [getkc id="202" kc_name="fan-out"] package for logic in Apple's iPhone 7, based on TSMC's Integrated Fan-Out (... » read more

Blog Review: Jan. 18


Mentor's Michael White warns that while skipping a node can be appealing, be prepared for the increase in computation requirements. Synopsys' Hezi Saar checks out the benefits of moving to the MIPI I3C standardized sensor interface. Cadence's Paul McLellan highlights a talk by Eric Grosse on approaches to security and the RISC-V architecture. Applied's Mike Chudzik explains the problem... » read more

Mobile Processors Move Beyond Phones


Mobile processors, also known as application processors, are well-known as the engines that run smartphones, tablet computers, and other wireless devices. But these chips increasingly are finding their way into autonomous vehicles, the Internet of Things, unmanned aerial vehicles, virtual reality, and other applications far beyond phone calls and text messages. Moreover, they are gaining in com... » read more

In-Vehicle Networks Are Safety, Security Dependent


It’s clear that managing, defining and prioritizing data traffic within vehicles is becoming an enormous challenge particularly with the growing number of networks , and underpining it all are safety and security concerns. Rob Knoth, product management director for the DSG group at Cadence observed, “The more you try to integrate traffic onto one bus, the more you are exposing systems th... » read more

The Week In Review: Design


IP eSilicon launched 14nm FinFET and 28nm planar HBM Gen2 Hardened PHY. It supports up to 256Gbytes/sec bandwidth with 8x128b channels at 2Gbps per I/O, and the integrated I/O supports up to 2Gbps DDR operation across a 4mm interposer channel. The PHY was developed on Samsung 14LPP and TSMC 28HPC technologies. Flex Logix designed a high-performance embedded FPGA IP core for TSMC 16FF+ and... » read more

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