tag: On Semiconductor

Money Pours Into New Fabs And Facilities
By Liz Allan - 03 Jan, 2024 - Comments: 0

Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 04 Mar, 2022 - Comments: 0

Packaging ASE, AMD, Arm, Google, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC have announced the formation of a consortium that will establish a die-to-die interconnect standard and foster an open chiplet ecosystem. The founding companies also ratified the UCIe specification, an open industry standard developed to establish a standard interconnect at the package level. The UCIe 1.0 s... » read more

Silicon-based Power Semis Face Challenges
By Mark LaPedus - 17 Feb, 2022 - Comments: 0

Suppliers of power semiconductors continue to develop and ship devices based on traditional silicon technology, but silicon is nearing its limits and faces increased competition from technologies like GaN and SiC. In response, the industry is finding ways to extend traditional silicon-based power devices. Chipmakers are eking out more performance and prolonging the technology, at least in th... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 27 Aug, 2021 - Comments: 0

Chipmakers, OEMs Reports have surfaced that TSMC has delayed its 3nm process. But TSMC says the technology remains on track. Volume production for TSMC’s 3nm is still scheduled for the second half of 2022. On the flip side, there is speculation that TSMC may increase its wafer prices by up to 20%, according to a report from the Taipei Times. Here's another report. This is due to chip shortag... » read more

Blog Review: June 23
By Jesse Allen - 23 Jun, 2021 - Comments: 0

Synopsys' Manuel Mota shows how splitting SoCs into smaller dies for advanced packaging and using die-to-die interfaces to enable high bandwidth, low latency, and low power connectivity can benefit hyperscale data centers. Siemens EDA's Chris Spear explains the relationship between classes and objects in SystemVerilog with a handy visualization and notes the difference between SystemVerilog ... » read more

Blog Review: June 16
By Jesse Allen - 16 Jun, 2021 - Comments: 0

Arm's Adrian Herrera explores the latest version of AMBA ATP Engine, an open-source implementation of the AMBA Adaptive Traffic Profiles (ATP) synthetic traffic framework specification, which adds the ability to program AMBA ATP traffic generation from Linux environments. Cadence's Paul McLellan finds out just how effective glitching chips is by delivering incorrect voltages and clock freque... » read more

Privacy Protection A Must For Driver Monitoring
By Ann Mutschler - 01 Apr, 2021 - Comments: 1

Driver monitoring systems are so tied into a vehicle's architecture that soon the driver will not be able to opt out because the vehicle will only operate if the driver is detected and monitored. This is raising privacy concerns about whether enough security is in place for the data to remain private. At the very least, laws and regulations in every geography where the vehicle will operate a... » read more

Blog Review: March 17
By Jesse Allen - 17 Mar, 2021 - Comments: 0

Synopsys' Chris Clark considers the growing number of automotive sensors and the cost/performance tradeoffs between edge computing capability, sensor fusion, sensor degradation, monitoring, and the maintenance of the software over the lifespan of a vehicle. Cadence's Paul McLellan checks out how the process of loading the bootstrap into memory has changed over the years, from hand-entered on... » read more

Blog Review: March 3
By Jesse Allen - 03 Mar, 2021 - Comments: 0

Siemens EDA's Ray Salemi considers incrementalism in engineering, the transition from drawing circuits to writing RTL, and the next big leap of using proxy-driven testbenches written in Python. Cadence's Shyam Sharma looks at key changes from LPDDR5 in the LPDDR5X SDRAM standard, which extends clock frequencies to include 937MHz and 1066MHz resulting in max data rates of 7500MT/s and 8533 MT... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 19 Feb, 2021 - Comments: 0

Chipmakers and OEMs A severe winter storm has hit many parts of the United States, including Texas. In Austin, utility providers are prioritizing service to residential areas. As a result, electricity and natural gas providers have temporarily suspended service to Austin’s semiconductor manufacturers, including Samsung and NXP. "Due to the recent blackouts in Texas, Samsung Austin Semicon... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy