Open Standards For Verification?


The increasing use of verification data for analyzing and testing complex designs is raising the stakes for more standardized or interoperable database formats. While interoperability between databases in chip design is not a new idea, it has a renewed sense of urgency. It takes more time and money to verify increasingly complex chips, and more of that data needs to be used earlier in the fl... » read more

One Flow To Rule Them All


The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

A Perspective On Open Process Specification


It is the job of the Process Design Kit (PDK) engineers to deliver a high-quality PDK that properly represents the process requirements and constraints and supports the design flows used by their customers. The PDK engineer takes multiple inputs describing the process and the devices and circuitry in the process and generates the output in the form of OpenAccess technology libraries (techDB), d... » read more

The Week In Review: System-Level Design


Synopsys won a deal with Germany’s Hyperstone, which will use Synopsys verification tools for SoCs in industrial, automotive and medical applications. As SoCs used in industrial and “safety-critical” markets grow in complexity and move to more advanced process nodes, more advanced tools also are necessary. Si2 uncorked a new release of its OpenAccess scripting interface—oaScript Exte... » read more