New Power Concerns At 10/7nm


As chip sizes and complexity continues to grow exponentially at 7nm and below, managing power is becoming much more difficult. There are a number of factors that come into play at advanced nodes, including more and different types of processors, more chip-package decisions, and more susceptibility to noise of all sorts due to thinner insulation layers and wires. The result is that engineers ... » read more

Noise Abatement


[getkc id="285" kc_name="Noise"] is a fact of life. Almost everything we do creates noise as a by-product and quite often what is a signal to one party is noise to another. Noise cannot be eliminated. It must be managed. But is noise becoming a larger issue in chips as the technology nodes get smaller and packaging becomes more complex? For some, the answer is a very strong yes, while for ot... » read more

Advanced Packaging For Automotive Dashboard Application


The current automotive market for the IC (integrated circuit) packaging industry has grown significantly due to the increasing need for automation and higher performance in vehicles. These changes in the automotive market will enable cars to be more reliable and intelligent. To address the increasingly complex demands of the automotive market, the semiconductor packaging industry is shifting it... » read more

Get Ready For In-Mold Electronics


Imagine inserting the electronics into a product without using a printed circuit board, a module, or even a system-in-package. That's the promise of in-mold electronics (IME), a technology that has been around for years, but which is just beginning to see wider adoption. The technology is related to conductive inks and transparent conductive films. The IME manufacturing process is said to pr... » read more

Integrated Photonics


Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Start Your HBM/2.5D Design Today


High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. In June 2015, AMD introduced its Fiji processor, the first HBM 2.5D design, which comp... » read more

Save Time And Minimize Errors By Automating Co-Design And Co-Analysis Of Chips, PCBs, And Packages


Given the complexity of today’s chips, packages, and PCBs, designing each in isolation is no longer judicious. Cross-domain co-design and co-analysis are key to ensuring optimal performance, cost reduction, and faster time to market. Such capabilities are provided by the Cadence Virtuoso System Design Platform, which integrates IC design—including multiple heterogeneous die—into the Alleg... » read more

Huawei Delivers Outstandingly Accurate Models


By John Parry, Mentor, a Siemens Business, and Yake Fang, Huawei Technologies Co., Ltd. Packaging high-performance multi-core IC devices used in communication applications is a key challenge for both manufacturers and system integrators. Traditionally a System-in-Package (SiP) has been taken, with chips mounted side-by-side, allowing differing semiconductor technologies to be mixed. More r... » read more

Board Level Reliability Of Automotive Embedded Wafer-Level BGA FOWLP


With shrinking chip sizes, Wafer Level Packaging (WLP) is becoming an attractive packaging technology with many advantages in comparison to standard Ball Grid Array (BGA) packages. With the advancement of various fan-out Wafer Level Packaging (FOWLP) designs, this advanced technology has proven to be a more optimal and promising solution compared to fan-in WLP because of the greater design flex... » read more

MEMS: Improving Cost And Yield


MEMS devices inspire awe on the design side. On the test and manufacturing side, they evoke a different kind of reaction. These are, after all, the intersection of mechanical and electrical engineering—a joining of two miniature worlds that are the basis of some of the most complex technology on the planet. But getting these devices to yield sufficiently, understanding what does or does no... » read more

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