System Performance Analysis At ARM


Performance analysis is a vital task in modern SoC design. An under-designed SoC may run too slowly to keep up with the demands of the system. An over- designed SoC will consume too much power and require more expensive IP blocks. At ARM we want to help our partners build SoCs that deliver the best performance within their power and area budgets. The simple truth is that this is more difficu... » read more

Safety Plus Security: A New Challenge


Nobody has ever integrated safety or security features into their design just because they felt like it. Usually, successive high-profile attacks are needed to even get an industry's attention. And after that, it's not always clear how to best implement solutions or what the tradeoffs are between cost, performance, and risk versus benefit. Putting safety and security in the same basket is a ... » read more

Shift Left Your FPGA Design For Faster Time To Market


In just a few short years, FPGAs have become an integral part of system design for many applications either as a co-processor or the main system processor. As FPGA size and performance increases, system designers are able to utilize them for more tasks. The increased size and performance translates to greater complexity, which is further compounded as designers try to integrate more functionali... » read more

Intelligent Power Allocation


The modern System-on-Chip (SoC) has higher thermal dissipation than its previous generations, because of the following factors: Increasing processor frequencies. Decreasing SoC package and device sizes. Higher levels of integration. Static power consumption trends with the most advanced SoC fabrication[1]. Faster frequencies mean faster switching, which means more power consumption... » read more

Tech Talk: Earlier Software


Malte Doerper, senior manager of product management at Synopsys, talks about the big "shift left" for software, where the problems crop up, and how to save as much as a year of development time with automation and better methodologies.   Related Stories Bridging Hardware And Software The need for concurrent hardware-software design and verification is increasing, but are engine... » read more

Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

The Zen Of Processor Design


Mark Papermaster, chief technology officer at Advanced Micro Devices, sat down with Semiconductor Engineering to discuss how to keep improving performance per watt, new packaging options, and the increasing focus on customization for specific tasks. What follows are excerpts of that conversation. SE: As we get more into the IoT and we have to deal with more data, not to mention cars where da... » read more

How Do We Get To Full Throttle In Mobile?


By Govind Wathan and Brian Fuller With each new generation of mobile device, we look forward to running the latest apps—especially games. (It's amazing how immersive mobile games have become in just a few years). We’re consumers but we’re also engineers, and here we’re faced with a huge challenge. It’s not just the games that get more powerful. A whole new generation of virtual ... » read more

No More Straight Lines


Shrinking features on a chip is no longer the only way forward, and in an increasing number of designs and markets, it is no longer the best way forward. Power and performance are generally better dealt with using different architectures and microarchitectures, and all of those provide the potential to reduce silicon area (cost). Cramming more transistors on a die and working around leakage... » read more

System-Level Verification Tackles New Role


Wally Rhines, chairman and CEO of Mentor Graphics, gave the keynote at DVCon this year. He said that if you pull together a bunch of pre-verified IP blocks, it does not change the verification problem at the system level. That sounds like a problem. There are assumptions made that the IP blocks work to a reasonable degree, and that when performing system-level verification the focus is not a... » read more

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