tag: performance

Better Video Compression
By Ed Sperling - 11 Apr, 2022 - Comments: 0

Video data is increasing, but bandwidth is not increasing quickly enough. One solution is to compress that data, but the challenge is to do that without impacting resolution. Rob Green, AMD’s senior manager for Pro AV, Broadcast & Consumer, talks about what’s changing in video compression, from new standards to better analytics, virtualization, what impact AR/VR will have, and a compari... » read more

Power Now First-Order Concern In More Markets
By Ann Mutschler - 10 Mar, 2022 - Comments: 0

Concerns about energy and power efficiency are becoming as important as performance in markets where traditionally there has been a significant gap, setting the stage for significant shifts in both chip architectures and in how those ICs are designed in the first place. This shift can be seen in a growing number of applications and vertical segments. It includes mobile devices, where batteri... » read more

Improving Performance And Simplifying Coding With XY Memory’s Implicit Parallelism
By Synopsys - 08 Mar, 2022 - Comments: 0

Instruction-level Parallelism (ILP) refers to design techniques that enable more than one RISC instruction to be executed simultaneously in the same instruction, which boosts processor performance by increasing the amount of work done in a given time interval, thereby increasing the throughput. This parallelism can be explicit, where each additional instruction is explicitly part of the instruc... » read more

Design Technology Co-Optimization
By Ed Sperling - 18 Jan, 2022 - Comments: 0

Rising complexity is making it increasingly difficult to optimize chips for yield and reliability. David Fried, vice president of computational products at Lam Research, examines the benefits of automated rules to manage the relationship between layout and design requirements on one side, and process flows and rules/checks on the other. Benefits include reduced margin, shortened time to market,... » read more

SOT-MRAM To Challenge SRAM
By Bryon Moyer - 13 Jan, 2022 - Comments: 1

In an era of new non-volatile memory (NVM) technologies, yet another variation is poised to join the competition — a new version of MRAM called spin-orbit torque, or SOT-MRAM. What makes this one particularly interesting is the possibility that someday it could supplant SRAM arrays in systems-on-chip (SoCs) and other integrated circuits. The key advantages of SOT-MRAM technology are the pr... » read more

Amdahl Limits On AI
By Brian Bailey - 09 Dec, 2021 - Comments: 0

Software and hardware both place limits on how fast an application can run, but finding and eliminating the limitations is becoming more important in this age of multicore heterogeneous processing. The problem is certainly not new. Gene Amdahl (1922-2015) recognized the issue and published a paper about it in 1967. It provided the theoretical speedup for a defined task that could be expected... » read more

HBM3: Big Impact On Chip Design
By Ann Mutschler - 14 Oct, 2021 - Comments: 0

An insatiable demand for bandwidth in everything from high-performance computing to AI training, gaming, and automotive applications is fueling the development of the next generation of high-bandwidth memory. HBM3 will bring a 2X bump in bandwidth and capacity per stack, as well as some other benefits. What was once considered a "slow and wide" memory technology to reduce signal traffic dela... » read more

Optimizing AI Systems
By Ed Sperling - 29 Sep, 2021 - Comments: 0

Inserting AI and machine learning into chips adds a whole new dimension of complexity, and creates a variety of potential problems, including deadlocks, loss of performance, and difficulty in achieving closure on many fronts. Gajinder Panesar, fellow at Siemens EDA, talks with Semiconductor Engineering about what’s changed and how to optimize these new devices and systems by monitoring them f... » read more

Wrestling With Analog At 3nm
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

Data Overload In The Data Center
By Ed Sperling - 25 Jan, 2021 - Comments: 0

Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

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