Mentor Graphics And IXIA De-Risk Networking SoC Verification


The Veloce VN App bridges the gap between pre-silicon verification and post-silicon validation of networking designs by integrating the industry-leading IXIA virtual networking test solution with the Veloce emulation platform. Networking design teams can now run the same tests in simulation, emulation and the lab. The Veloce VN App supports high performance and offers debug advantage of pre-sil... » read more

From Specification To Chip: A Holistic Design Approach


Chip design is getting more and more challenging in terms of power, performance, area and IP integration. At the same time, competition and time-to-market are forcing much tighter schedules. The traditional ASIC design approach taken by OEMs is to handle the majority of front-end design in-house, and then hand off either register-transfer level (RTL) code or a netlist to an outside vendor, who ... » read more

The Week In Review: Design


Tools Mentor Graphics unveiled a new version of its PCB design platform, even going so far as to rename it slightly (Expedition to Xpedition). Mentor claims it’s the most significant product in that space in years, bridging the environments between designers and engineers. Included are placement planning in densely packed boards, which simplifies re-use and improves time to market, and elect... » read more