Tech Talk: Power Sign-Off

Calvin Chow, area technical manager at Ansys, talks about power sign-off for complex SoCs at advanced nodes, including early stage prototyping, the importance of context, accurate power modeling of sub-blocks, and simulation of power-delivery networks. [youtube vid=MN4TjZ3dHVk] » read more

FinFET-Based Designs: Power Sign-off Considerations

FinFET devices can operate at ultra-low sub-1V nominal supply voltage levels without impacting their delays. This allows for low power, higher performance designs needed for many of todays’ applications. These devices also have considerably higher drive strengths, allowing faster operating speeds. However, this can result in more localized di/dt current scenarios, and when coupled with more r... » read more