tag: process variation

Robust Variation-Aware Smart Power Designs For Silicon Success
By Nebabie Kebebew - 29 Jul, 2021 - Comments: 0

Power management ICs (PMICs) is a rapidly growing segment in the semiconductor industry. The growth has been fueled by the demand for Smart Power applications that include wearable electronics, mobile computing platforms, printers, hard disk drives (HDD), IoT devices, and the full array of automotive applications. According to a report from market research firm Coherent Market Insights, the gl... » read more

Process Variation Analysis of Device Performance Using Virtual Fabrication
By Coventor - 16 Dec, 2020 - Comments: 0

A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. The model was subsequently calibrated on Design of Experiment corner case data that had been collected on a limited number of processed fab wafers. W... » read more

Dealing With Sub-Threshold Variation
By Bryon Moyer - 12 Nov, 2020 - Comments: 0

Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental variation long have been concerns for advanced silicon process nodes, most designs operate in the standard “super-threshold” regime. Sub-threshold designs, in contrast, have unique variatio... » read more

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff
By Rahul Deokar - 10 Nov, 2020 - Comments: 0

As process nodes shrink, complexity, cost and overall risk expand. Process variability that once was once acceptable now becomes a critical item as operating voltage decreases. Simply adding design margin makes the chip non-competitive. Physical effects that were once ignored now become critical as well. The impact of interconnect can no longer be modeled based on simple circuit topology. Layou... » read more

Better Analytics Needed For Assembly
By Anne Meixner - 11 Aug, 2020 - Comments: 0

Package equipment sensors, newer inspection techniques, and analytics enable quality and yield improvement, but all of those will require a bigger investment on the part of assembly houses. That's easier said than done. Assembly operations long have operated on thin profit margins because their tasks were considered easy to manage. Much has changed over the past several years, however. The r... » read more

No Two Chips Are Alike
By Alex Burlak - 27 Jul, 2020 - Comments: 0

As semiconductor processes continue to shrink it’s becoming increasingly challenging to manage the parameters of individual devices not only across the diameter of the wafer, but also across the length of a single chip, especially for a complex chip with a large area. Today’s standard approach to this problem is to assume the worst case and to create a sub-optimal design that accommodates t... » read more

Semiconductor Memory Evolution And Current Challenges
By Michael Hargrove - 16 Jul, 2020 - Comments: 0

The very first all-electronic memory was the Williams-Kilburn tube, developed in 1947 at Manchester University. It used a cathode ray tube to store bits as dots on the screen’s surface. The evolution of computer memory since that time has included numerous magnetic memory systems, such as magnetic drum memory, magnetic core memory, magnetic tape drive, and magnetic bubble memory. Since the 19... » read more

Monitoring IC Abnormalities Before Failures
By Anne Meixner - 07 Jul, 2020 - Comments: 0

The rising complexities of semiconductor processes and design are driving an increasing use of on-chip monitors to support data analytics from an IC’s birth through its end of life — no matter how long that projected lifespan. Engineers have long used on-chip circuitry to assist with manufacturing test, silicon debug and failure analysis. Providing visibility and controllability of inter... » read more

Monitoring For In-Die Process Speed Detection
By Richard McPartland - 14 May, 2020 - Comments: 0

Chip designers working on advanced nodes typically include a fabric of sensors spread across the die for a number of very specific reasons. In this, the second of a three-part blog series, we explore some of the key applications and benefits of these types of sensing solutions. In this installment, the focus is In-Die Process Speed Detection and why understanding in-chip process speed detecti... » read more

Avoiding Gloom With Better Knowledge
By Stephen Crosher - 12 Mar, 2020 - Comments: 0

The rate of product development is facing very real challenges as the pace of silicon technology evolution begins to slow. Today, we are squeezing the most out of transistor physics, which is essentially derived from 60-year-old CMOS technology. To maintain the pace of Moore’s law, it is predicted that in 2030 we will need transistors to be a sixth of their current size. Reducing transistor s... » read more

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