How Much Verification Is Necessary?


Since the advent of IC design flows, starting with RTL descriptions in languages like Verilog or VHDL, project teams have struggled with how much verification can and should be performed by the original RTL developers. Constrained-random methods based on high-level languages such as [gettech id="31021" t_name="e"] or [gettech id="31023" comment="SystemVerilog"] further cemented the role of t... » read more

The Week In Review: Design


M&A Verific acquired Invionics' entire INVIO technology portfolio, adding a high-level scripting interface with 100 high-level APIs to its Parser Platform of approximately 2,000 low-level SystemVerilog and VHDL APIs. An R&D group from the company will also join Verific. Portable Stimulus An Early Adopter release of the Portable Stimulus specification has been made publicly availabl... » read more

Verification Cowboys


There was an event at DVCon that was both fun and serious. It was a panel of verification startup executives with the title "Ride with the Verify Seven." Many of you know [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"] who were the sponsors of the event, along with [getentity id="22914" e_name="ESD Alliance"], the organizat... » read more

Reflecting Back on 2016: Markets


Anyone can make a prediction, and sometimes the more outlandish they are the more they get noticed. But at the end of the year some people hit the mark while others may have been way off. Many people simply make projections based on the current trajectory of trends, while others look for the potential discontinuities that may lie ahead. Semiconductor Engineering examines the projections made... » read more

The Week In Review: Design


M&A Siemens plans to buy Mentor Graphics for $4.5 billion in cash. The move, if approved by regulators, would greatly expand Siemens’ capabilities in multi-physics design and embedded software for everything from semiconductors to automotive wiring harnesses. The transaction is expected to close in the second quarter of 2017. Tools Mentor Graphics uncorked a new product to measur... » read more

The Week In Review: Design


Tools Real Intent updated its Ascent Lint product, adding 50 new customer-driven rules, improved support of VHDL and System Verilog, and a new database-driven debugger with an integrated source browser and improved schematic visualization. IP ARM launched a new real-time processor with advanced safety features for autonomous vehicles and medical and industrial robots. The processor, Co... » read more

Near-Threshold Computing


The emergence of the Internet of Things (IoT) has brought a lot of attention to the need for extremely low-power design, and this in turn has increased the pressure for voltage reduction. In the past, each new process node shrunk the feature size and lowered the nominal operating voltage. This resulted in a drop in power consumption. However, the situation changed at about 90nm in two ways. ... » read more

Powerful New Standard


In December 2015, the IEEE released the latest version of the 1801 specification, titled the IEEE standard for design and verification of low-power integrated circuits, but most people know it as UPF or the Unified Power Format. The standard provides a way to specify the power intent associated with a design. With it, a designer can define the various power states of the design and the contexts... » read more

Getting Formal About Debug


While much of the design and verification flows have been automated, debug remains the problem child. It has defied automation and presents a management nightmare due to the variability of the process. In recent articles about debug, we examined how much time development teams spend in the debug process and some of the reasons why it is becoming a bigger problem. This includes issues such as ex... » read more

Powerful New Standard


In December the IEEE released the latest version of the 1801 specification, entitled the IEEE standard for design and verification of low-power integrated circuits. Most people know it as UPF, or the Unified Power Format. That was the name the first version of it held while being developed within Accellera. The standard provides a way to specify the power intent associated with a design, enabli... » read more

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