Is Advanced Packaging The Next SoC?

Device scaling appears to be possible down to 1.2nm, and maybe even beyond that. What isn't obvious is when scaling will reach that node, how many companies will actually use it, or even what chips will look like when foundries actually start turning out these devices using multi-patterning with high-NA EUV and dielectrics with single-digit numbers of atoms. There are two big changes playing... » read more

Finding Faulty Auto Chips

The next wave of automotive chips for assisted and autonomous driving is fueling the development of new approaches in a critical field called outlier detection. KLA-Tencor, Optimal+, as well as Mentor, a Siemens Business, and others are entering or expanding their efforts in the outlier detection market or related fields. Used in various industries for several years, outlier detection is one... » read more

A Reliability Baseline Is Essential For Today’s Complex IC Designs

Design rule checking (DRC) represents a common platform by which we can all compare relative rule complexity. The industry expectation is that all foundries will provide complete DRC and layout vs. schematic (LVS) rule decks at all process nodes for the successful tape-out of IC designs. However, not only are DRC operations growing significantly (Figure 1), but the scope of the rules needed to ... » read more

Chip Aging Accelerates

Reliability is becoming an increasingly important proof point for new chips as they are rolled out in new markets such as automotive, cloud computing and industrial IoT, but actually proving that a chip will function as expected over time is becoming much more difficult. In the past, reliability generally was considered a foundry issue. Chips developed for computers and phones were designed ... » read more

Avoiding Down Times: Monitoring, Diagnostics And Troubleshooting Of Industrial Wireless Systems

The ever-growing proliferation of wireless devices and technologies used for Internet of Things (IoT) applications, such as patient monitoring, military surveillance, and industrial automation and control, has created an increasing need for methods and tools for connectivity prediction, information flow monitoring, and failure analysis to increase the dependability of the wireless network. Inde... » read more

Electronic Design For Reliable Autonomous Driving

In the area of advanced driver assistance systems, most car makers and their suppliers have laid out exciting road maps all the way to highly automated and fully automated driving in 5 to 10 years. But are the electronics keeping up with these ambitious plans? At least for the automotive industry as a mass market, the current design processes for microchips and systems are not yet ready. An ... » read more

Auto Chip Test Issues Grow

By Jeff Dorsch & Ed Sperling Semiconductor suppliers are flocking to the automotive chip market to gain share in fitting out the connected car and the autonomous vehicle. But before those chips are sold to automotive manufacturers and Tier 1 suppliers, they must be tested and certified to meet stringent industry standards. This is no ordinary testing, though. Assisted and autonomous v... » read more

Measuring ISO 26262 Metrics Of Analog Circuitry In ICs

The goals for automotive electronics are zero defective parts per million (0 DPPM), and safe operation during the expected lifetime of the vehicle. The ISO 26262 standard provides procedures and metrics required before delivery to ensure systems can be expected to operate without unreasonable risk. ISO 26262 specifies circuit metrics and minimum values that are design requirements. Since the... » read more

The Trouble With Models

Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Modeling is a way of abstracting the complexity in various parts of the semiconductor design, and there can be dozens of models required for complex SoCs. Some are ... » read more

Tech Talk: Substrate Noise Coupling

Roland Jancke, head of the department for design methodology for the Fraunhofer's Engineering of Adaptive Systems Division, talks with Semiconductor Engineering about the impact of substrate noise coupling on reliability of chips and how to deal with this issue. » read more

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