Analog’s Rising Status


As more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. [getkc id="37" kc_name="Analog"] and digital always have fit rather uncomfortably together, and that discomfort has grown as [getkc id="81" kc_name="SoCs"] are built using smaller feature sizes. While digital transis... » read more

7nm Design Success Starts With Multi-Domain Multi-Physics Analysis


Companies can benefit from advancements in the latest semiconductor process technology by delivering smaller, faster and lower power products, especially for those servicing mobile, high performance computing and automotive ADAS applications. By using 7nm processes, design teams are able to add a lot more functionality onto a single chip and lower the power consumption by scaling operating volt... » read more

Implementing ESD Protection In Today’s SoCs


As the semiconductor industry transitions to FinFETs, reliability challenges are increasing. ESD designers are challenged with new issues that would require significant rethinking and redesign of their existing ESD protection strategy. With significant complexity embedded in the silicon, failure analysis and silicon debug is challenging and time consuming even to the ESD experts. Technology ... » read more

How Small Will Transistors Go?


By Mark LaPedus & Ed Sperling There is nearly universal agreement that Moore’s Law is slowing down. But whether it will truly end, or just become too expensive and less relevant—and what will supplant device scaling—are the subject of some far-reaching research and much discussion. Semiconductor Engineering sat down with each of the leaders of three top research houses—[getent... » read more

Bridging The Gap Between RF Front-End Module Characterization And Production Test With The Semiconductor Test System


he rapid evolution of wireless connectivity has driven continual consumer thirst for more data throughput and reduced time to market. These pressures have led to modern signaling standards such as 802.11ac and LTE-Advanced, which have placed even more challenging design and test requirements on the most nonlinear and energy-demanding component in the transmitter, the RF power amplifier. The ind... » read more

How Will 5G Work?


Sumit Tomar, general manager of the Wireless Infrastructure Products Group at RF chip giant Qorvo, sat down with Semiconductor Engineering to discuss the development of next-generation 5G wireless networks and other topics. In 2014, RF Micro Devices and TriQuint merged to form Qorvo. What follows are excerpts of that conversation. SE: 5G, the follow-on to the current wireless standard known ... » read more

Waiting For 5G Technology


For some time, carriers, equipment OEMs and chipmakers have been gearing up for the next-generation wireless standard called 5th generation mobile networks, or 5G. 5G is the follow-on to the current wireless standard known as 4G, or long-term evolution (LTE). It will enable data transmission rates of more than 10Gbps, or 100 times the throughput of LTE. But the big question is whether 5G wil... » read more

A New Approach For IC Test


Since its inception, a founding principle of the semiconductor industry has been to continually improve performance while driving down cost. In other words, offer more for the money. However, amid greater device complexity, shorter product cycles, and relentless cost pressure, the test portion represents an increasing percentage of the total IC cost and a significant part of the product develop... » read more

Bulk CMOS Vs. FD-SOI


The leading edge of the chip market increasingly is divided over whether to move to finFETs or whether to stay at 28nm using different materials and potentially even advanced packaging. Decisions about which approach to take frequently boil down to performance, power, form factor, cost, and the maturity of the individual technologies. All of those can vary by market, by vendor and by process... » read more

Pattern Matching in Design and Verification


Pattern matching (PM) was first introduced as the semiconductor industry began to shift from simple one-dimensional rule checks to the two-dimensional checks required by sub-resolution lithography. These rule checks proved far more complex to write, hard to code for fast runtimes, and difficult to debug. Incorporating an automated visual capture and compare process enabled designers to define t... » read more

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