Patterning Problems Pile Up


Chipmakers are ramping up 16nm/14nm finFET processes, with 10nm and 7nm now moving into early production. But at 10nm and beyond, chipmakers are running into a new set of problems. While shrinking feature sizes of a device down to 10nm, 7nm, 5nm and perhaps beyond is possible using current and future fab equipment, there doesn't seem to be a simple way to solve the edge placement error (EPE)... » read more

Battling Fab Cycle Times


The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node. Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and... » read more

BEOL Issues At 10nm And 7nm


Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Architect Specs Harder To Follow


Interpreting and implementing architects' specifications is getting harder at each new process node, which is creating problems throughout the design flow, into manufacturing, and sometimes even post-production. Rising complexity and difficulties in scaling have pushed much more of the burden onto architects to deal with everything from complex power schemes, new packaging approaches, and to... » read more

Timing Closure Issues Resurface


Timing closure has resurfaced as a major challenge at 10nm and 7nm due to more features and power modes, increased process variation and other manufacturing-related issues. While timing-related problems are roughly correlated to rising complexity in semiconductors, they tend to generate problems in waves—about once per decade. In SoCs, timing closure problems have spawned entire methodolog... » read more

Fill/Cut Self-Aligned Double-Patterning


By David Abercrombie, Rehab Ali, Ahmed Hamed-Fatehy, and Shetha Nolke Self-aligned double patterning (SADP) is an alternative double-patterning process to the traditional litho-etch-litho-etch (LELE) approach used in most advanced production nodes. The main difference between the two approaches is that in LELE, the layout is divided between two masks, and the second mask is aligned with resp... » read more

Why EUV Is So Difficult


For years, extreme ultraviolet (EUV) lithography has been a promising technology that was supposed to help enable advanced chip scaling. But after years of R&D, EUV is still not in production despite major backing from the industry, vast resources and billions of dollars in funding. More recently, though, [gettech id="31045" comment="EUV"] lithography appears to be inching closer to pos... » read more

Deeper Inside Intel


Mark Bohr, senior fellow and director of process architecture and integration at Intel, and Zane Ball, vice president in the Technology and Manufacturing Group at Intel and co-general manager of Intel Custom Foundry, sat down with Semiconductor Engineering to discuss the future directions of transistors, process technology, the foundry business and packaging. What follows are excerpts of those ... » read more

Atomic Layer Etch Heats Up


The atomic layer etch (ALE) market is starting to heat up as chipmakers push to 10nm and beyond. ALE is a promising next-generation etch technology that has been in R&D for the last several years, but until now there has been little or no need to use it. Unlike conventional etch tools, which remove materials on a continuous basis, ALE promises to selectively and precisely remove targete... » read more

What Happened To DSA?


Directed self-assembly (DSA) was until recently a rising star in the next-generation lithography (NGL) landscape, but the technology has recently lost some of its luster, if not its momentum. So what happened? Nearly five years ago, an obscure patterning technology called [gettech id="31046" t_name="DSA"] burst onto the scene and began to generate momentum in the industry. At about that t... » read more

← Older posts