tag: selective deposition

Enabling Advanced Devices With Atomic Layer Processes
By Katherine Derbyshire - 18 Apr, 2024 - Comments: 1

Atomic layer deposition (ALD) used to be considered too slow to be of practical use in semiconductor manufacturing, but it has emerged as a critical tool for both transistor and interconnect fabrication at the most advanced nodes. ALD can be speeded up somewhat, but the real shift is the rising value of precise composition and thickness control at the most advanced nodes, which makes the ext... » read more

Site-Specific Compositional Info from Periodic Nanostructures Obtained Using Rutherford Backscattering Spectrometry
By Technical Paper Link - 28 Oct, 2022 - Comments: 0

A new technical paper titled "Quantification of area-selective deposition on nanometer-scale patterns using Rutherford backscattering spectrometry" was published by researchers at IMEC and KU Leuven. "We present a site-specific elemental analysis of nano-scale patterns whereby the data acquisition is based on Rutherford backscattering spectrometry (RBS). The analysis builds on probing a larg... » read more

ASD process that was performed in situ on the etch chamber
By Technical Paper Link - 06 May, 2022 - Comments: 0

New research paper entitled "Plasma-based area selective deposition for extreme ultraviolet resist defectivity reduction and process window improvement" from TEL Technology Center, Americas and IBM Research. Abstract: "Extreme ultraviolet (EUV) lithography has overcome significant challenges to become an essential enabler to the logic scaling roadmap. However, it remains limited by stocha... » read more

Extending Copper Interconnects To 2nm
By Laura Peters - 17 Mar, 2022 - Comments: 0

Transistor scaling is reaching a tipping point at 3nm, where nanosheet FETs will likely replace finFETs to meet performance, power, area, and cost (PPAC) goals. A significant architectural change is similarly being evaluated for copper interconnects at 2nm, a move that would reconfigure the way power is delivered to transistors. This approach relies on so-called buried power rails (BPRs) and... » read more

Making Chips At 3nm And Beyond
By Mark LaPedus and Ed Sperling - 16 Apr, 2020 - Comments: 4

Select foundries are beginning to ramp up their new 5nm processes with 3nm in R&D. The big question is what comes after that. Work is well underway for the 2nm node and beyond, but there are numerous challenges as well as some uncertainty on the horizon. There already are signs that the foundries have pushed out their 3nm production schedules by a few months due to various technical issu... » read more

New Nodes, Materials, Memories
By Ed Sperling - 15 Feb, 2018 - Comments: 0

Ellie Yieh, vice president and general manager of Advanced Product Technology Development at [getentity id="22817" e_name="Applied Materials"], and head of the company's Maydan Technology Center, sat down with Semiconductor Engineering to talk about challenges, changes and solutions at advanced nodes and with new applications. What follows are excerpts of that conversation. SE: How far can w... » read more

Inside Lithography And Masks
By Mark LaPedus - 01 May, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="IMEC"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; David Fried, chief technology officer at [getentity id="22210" e_name="Cov... » read more

Can Nano-Patterning Save Moore’s Law?
By Mark LaPedus - 19 Nov, 2015 - Comments: 0

For years the academic community has explored a novel technology called selective deposition. Then, more than a year ago, Intel spearheaded an effort to bring the technology from the lab to the fab at 7nm or 5nm. Today, selective deposition is still in R&D, but it is gaining momentum in the industry. With R&D funding from Intel and others, selective deposition, sometimes called ALD-e... » read more

ALD Market Heats Up
By Mark LaPedus - 17 Sep, 2015 - Comments: 1

Amid the shift to 3D NAND, finFETs and other device architectures, the atomic layer deposition (ALD) market is heating up on several fronts. Applied Materials, for example, recently moved to shakeup the landscape by rolling out a new, high-throughput ALD tool. Generally, [getkc id="250" kc_name="ALD"] is a process that deposits materials layer-by-layer at the atomic level, enabling thin and ... » read more

Pathfinding Beyond 10nm
By Paula Doe - 10 Aug, 2015 - Comments: 0

After higher aspect-ratio finFETs and higher mobility SiGe and III-V materials, the industry will move to lateral nanowires and then to vertical nanowire transistors, and to new tunnel junction FETs or spin wave architectures ─ or to various combinations of these technologies for different applications, reported An Steegan, Imec senior vice president of process technology, during SEMICON West... » read more

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