tag: simulation

Engineers Or Their Tools: Which Is Responsible For Finding Bugs?
By Ann Mutschler and Adam Kovac - 28 Mar, 2024 - Comments: 0

Experts at the table: Finding and eliminating bugs at the source can be painstaking work, but it can prevent bigger problems later in the design flow, when they are more difficult and expensive to fix.  Semiconductor Engineering sat down to discuss these issues with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software... » read more

Digital Twins Target IC Tool And Fab Efficiency
By Laura Peters - 21 Mar, 2024 - Comments: 0

Digital twins have emerged as the hot "new" semiconductor manufacturing technology, enabling fabs to create a virtual representation of a physical system on which to experiment and optimize what's going on inside the real fab. While digital twin technology has been in use for some time in other industries, its use has been limited in semiconductor manufacturing. What's changing is the breadt... » read more

Verifying Hardware Security With RTL Simulation
By Taruna Reddy - 14 Mar, 2024 - Comments: 0

When consumers think about security for their electronic gadgets, financial applications probably spring first to mind. Identity theft and unauthorized access to bank and investment accounts are a constant threat. But there’s more to worry about every day. Stories of webcams and smart speakers being hacked are all over the web. Users rightfully demand that device manufacturers provide a high ... » read more

How Multiphysics Simulation Enables 3D-IC Implementation At The Speed Of Light
By Ansys - 13 Mar, 2024 - Comments: 0

Electronic designers need greater integration densities and faster data transfer rates to meet the increased performance requirements of technologies like 5G/6G, autonomous driving, and artificial intelligence. The semiconductor industry is shifting toward 3D-IC design to keep up with the ever-growing demand for high-performance and power-efficient devices that has outpaced the capabilities o... » read more

Simulation With Taint Propagation For Security Verification
By Synopsys - 13 Mar, 2024 - Comments: 0

Security has arisen as a primary concern for many types of electronic devices. A wide range of malicious agents is constantly probing and looking for weaknesses to try to steal confidential information or exert unauthorized control. The need for security has been well understood and widely adopted in software for years. Techniques such as passwords, multi-factor authentication, and biometric ch... » read more

Complex Safety Mechanisms Require Interoperability And Automation For Validation And Metric Closure
By Siemens EDA - 06 Mar, 2024 - Comments: 0

The race to autonomous mobility among the automobile manufacturers is driving the evolution of the underlying semiconductors. As a result, semiconductor technologies are moving towards higher densities and lower operating voltages, and this migration is introducing increasing sensitivity to random hardware failures – the failures which occur unpredictably over a semiconductor’s lifetime. Mo... » read more

Optimizing EDA Cloud Hardware And Workloads
By Aharon Etengoff - 04 Mar, 2024 - Comments: 0

Optimizing EDA hardware for the cloud can shorten the time required for large and complex simulations, but not all workloads will benefit equally, and much more can be done to improve those that can. Tens of thousands of GPUs and specialized accelerators, all working in parallel, add significant and elastic compute horsepower for complex designs. That allows design teams to explore various a... » read more

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches
By Technical Paper Link - 06 Feb, 2024 - Comments: 0

A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven. Abstract: "Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not... » read more

Formal Verification’s Usefulness Widens
By Ann Mutschler - 31 Jan, 2024 - Comments: 0

Formal verification is being deployed more often and in more places in chip designs as the number of possible interactions grows, and as those chips are used in more critical applications. In the past, much of formal verification was focused on whether a chip would function properly. But as designs become more complex and heterogeneous, and as use cases change, formal verification is being u... » read more

Design Space Simulator Of Distributed Multi-Chiplet Manycore Architectures For Comm-Intensive Applications
By Technical Paper Link - 04 Jan, 2024 - Comments: 0

A technical paper titled “Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems” was published by researchers at Princeton University. Abstract: "Current design-space exploration tools cannot accurately evaluate communication-intensive applications whose execution is data-dependent (e.g., graph analytics and sparse linear algebra) on scale-out manycore sys... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy