System Performance Analysis At ARM


Performance analysis is a vital task in modern SoC design. An under-designed SoC may run too slowly to keep up with the demands of the system. An over-designed SoC will consume too much power and require more expensive IP blocks. At ARM we want to help our partners build SoCs that deliver the best performance within their power and area budgets. The simple truth is that this is more difficul... » read more

Embedded FPGAs Going Mainstream?


Systems on chip have been made with many processing variants ranging from general-purpose CPUs to DSPs, GPUs, and custom processors that are highly optimized for certain tasks. When none of these options provide the necessary performance or consumes too much power, custom hardware takes over. But there is one type of processing element that has rarely been used in a major SoC— the [gettech id... » read more

Coherency: The New Normal In SoCs


We are not far from devices each handling 100 teraflops of compute, billions of pixels of display, hundreds of gigabits of connectivity, and terabytes of storage. Compared with current state-of-the-art mobile SoCs, these are increases of one or two orders of magnitude — at similar or preferably lower power consumption. SoC design is changing to meet this challenge. Multicore architecture i... » read more

Find The Best IP For You


It can be quite challenging and time consuming to find the right semiconductor IP for your project. You’ve got to find IP that does not consume too much power, meets your performance target, has the lowest leakage when your product goes on standby, and last but not least, IP that occupies the least amount of expensive real estate on your chip. How can you accomplish such a task without having... » read more

Executive Insight: Wally Rhines


[getperson id="11694" p_name="Wally Rhines"], chairman and CEO of [getentity id="22017" e_name="Mentor Graphics"], sat down with Semiconductor Engineering to talk about changes in automotive electronics, IoT security issues, and how this affects semiconductor design. What follows are excerpts of that conversation. SE: In automotive, one of the big changes is that we are no longer dealing wit... » read more

Back To Basics On Multi-Voltage Verification


It has been more than a decade since the paradigm of voltage-aware Booleans came about and the world of multi-voltage verification took off. We started with 3-5 island SoCs and now stare at 300+ islands on a single SoC. While we have a well-developed standard (IEEE 1801/UPF) for the expression and analysis of voltage variation, it is apt to not forget some of the basics and see how they will ca... » read more

Making Verification Easier


SoC design teams increasingly are confronting complexity in the quest to target application segments, but at the same time they are struggling to more quickly reduce risk in their designs while also speed up testing to make sure everything works. Those often-conflicting goals have transformed [getkc id="10" kc_name="verification"] IP from an interesting concept to a must-have tool for advanc... » read more

How Cache Coherency Impacts Power, Performance


As discussed in part one, one of the reasons cache coherency is becoming more important is the shared common memory resource in designs today. Various agents in the design want to access the data the fastest they can, putting pressure on the CPU complex to manage all of the requests. Until a generation ago, it was okay for the CPU to control that memory and have access to it, as well as be t... » read more

Architecting Memory For Next-Gen Data Centers


The industry’s insatiable appetite for increased bandwidth and ever-higher transfer rates is driven by a burgeoning Internet of Things (IoT), which has ushered in a new era of pervasive connectivity and generated a tsunami of data. In this context, datacenters are currently evaluating a wide range of new memory initiatives. All seek to optimize efficiency by reducing data transport, thus sign... » read more

How Cache Coherency Impacts Power, Performance


Managing how the processors in an SoC talk to one another is no small feat, because these chips often contain multiple processing units and caches. Bringing order to these communications is critical for improving performance and [getkc id="106" kc_name="reducing power"]. But it also requires a detailed understanding of how data moves, the interaction between hardware and software, and what c... » read more

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