Planar Fully Depleted Silicon Technology To Design Competitive SoCs At 28nm And Beyond

This document considers the challenges to obtain competitive silicon technology for the upcoming generation of System-On-Chip ICs. It suggests planar fully depleted technology deserves serious interest. After outlining some implementation choices, a number of circuit-level benchmark results as well as some important design aspects are presented. It is found that this technology combines high pe... » read more