Blog Review: Nov. 8


Synopsys' Eric Huang digs in to what's new with USB 3.2 and what's achieved by preserving the existing PHY signaling speeds. In a video, Mentor's Colin Walls provides tips on how to write debuggable and maintainable embedded code. Cadence's Paul McLellan listens in on a talk by Andrew Kahng of UC San Diego on the problem of scaling and why machine learning can improve EDA tools. Rambus... » read more

Blog Review: Oct. 25


Mentor's Joe Hupcey III explains the benefits of prioritizing faults with formal analysis before launching detailed fault verification. Cadence's Paul McLellan listens in as AMD's Mark Papermaster discusses what's needed to keep driving Moore's Law. Synopsys' Jesse Victors takes a look at ROCA, the latest flaw affecting RSA cryptography, and argues it may be time for a new encryption sche... » read more

How To Build An IoT Chip


Semiconductor Engineering sat down to discuss IoT chip design issues with Jeff Miller, product marketing manager for electronic design systems in the Deep Submicron Division of [getentity id="22017" e_name="Mentor, a Siemens Business"]; Mike Eftimakis, IoT product manager in [getentity id="22186" e_name="Arm"]'s Systems and Software Group; and John Tinson, vice president of sales at Sondrel Ltd... » read more

Blog Review: Oct. 11


Mentor's Matthew Balance examines the separation of concerns between test intent and test realization in the Portable Stimulus specification. Synopsys' Deepak Nagaria checks out the features that makes LPDDR4 efficient in terms of power consumption, bandwidth utilization, data integrity and performance. Cadence's Meera Collier listens in as Chris Rowen considers whether AI processing shou... » read more

Blog Review: Sept. 20


Mentor's Jeff Miller warns that MEMS accelerometers are vulnerable to takeover using specially constructed sound waves, as demonstrated in a new paper. Synopsys' Pooja Gupta and Srinivas Vijayaragavan explain some major technology updates in SAS 24G with a look at Binary primitives, Extended Binary primitives and primitive parameters. Cadence's Paul McLellan shares highlights from TSMC's ... » read more

How To Build An IoT Chip


Semiconductor Engineering sat down to discuss IoT chip design issues with Jeff Miller, product marketing manager for electronic design systems in the Deep Submicron Division of [getentity id="22017" e_name="Mentor, a Siemens Business"]; Mike Eftimakis, IoT product manager in [getentity id="22186" comment="ARM"]'s Systems and Software Group; and John Tinson, vice president of sales at Sondrel Lt... » read more

The Week In Review: Design


M&A Consultancy Sondrel acquired IMGworks, formerly the design services unit of Imagination. Sondrel says it plans to focus on design services for ADAS systems, AI, and machine vision and learning devices. Terms of the deal were not disclosed. Tools Cadence expanded its formal verification platform, JasperGold, adding linting and clock domain crossing apps that address RTL signoff ... » read more

The Week In Review: IoT


Design Automation Conference ARM Holdings announced that its DesignStart initiative to enable easy creation of chip designs using ARM Cortex-M0 intellectual property now takes in electronic design automation tools and design environments offered by Cadence Design Systems and Mentor Graphics. “Simplifying access to EDA tools from Cadence and Mentor Graphics will further spur rapid innovation,... » read more