tag: substrates

Addressing Yield Challenges In Advanced IC Substrate (AICS) Packaging
By Keith Best - 09 May, 2023 - Comments: 0

No matter how you get your news, it seems like everyone is talking about AI – and it’s either going to usher in a new era of productivity or lead to the end of humankind itself. Regardless, the AI era is here, and it’s just beginning to have an impact on our lives, our jobs and our future. To meet the rigorous demands of AI – along with high-performance compute, 5G and electric vehic... » read more

Addressing Total Overlay Drift In Advanced IC Substrate (AICS) Packaging
By Keith Best - 07 Mar, 2023 - Comments: 0

For years, many in the semiconductor industry have focused on the march toward advanced nodes. As these nodes have decreased in size, the size of input/output (I/O) bumps on the chip has grown smaller. As these bumps shrink, their ability to mate directly to printed circuit boards (PCB) diminishes, which, in turn, leads to the need for an intermediary substrate. Enter the advanced IC substrate ... » read more

Advanced Packaging for High-Bandwidth Memory: Influences of TSV size, TSV Aspect Ratio And Annealing Temperature
By Technical Paper Link - 13 Feb, 2023 - Comments: 0

A technical paper titled "Stress Issue of Vertical Connections in 3D Integration for High-Bandwidth Memory Applications" was published by researchers at National Yang Ming Chiao Tung University. Abstract: "The stress of TSV with different dimensions under annealing condition has been investigated. Since the application of TSV and bonding technology has demonstrated a promising approach for ... » read more

An Organic Package Designer’s Guide To Transitioning To FOWLP And 2.5D Design
By Siemens EDA - 23 Nov, 2022 - Comments: 0

The IC packaging design tool set has matured to the point where it can address not only classic plastic, organic and ceramic packaging substrates but can also address silicon substrates driven by interposer and chiplet designs. In most cases system and packaging teams do not have to abandon their existing tool set to support these designs. In fact, the packaging design tool set can offer additi... » read more

Equipment Suppliers Brace For GaN Market Explosion
By Adele Hars - 18 Aug, 2022 - Comments: 0

A huge GaN market is opening up, driven by consumer devices and the need for greater energy efficiency across many applications. Suppliers are ready, but to fully compete with SiC in high-voltage automotive applications will require further technological developments in power GaN (gallium nitride). Still, the 2020s mark a very high-growth phase for GaN markets. Revenues in the power GaN mark... » read more

How Quickly Can SiC Ramp?
By Adele Hars - 21 Jul, 2022 - Comments: 0

Device makers across the globe are ramping silicon carbide (SiC) manufacturing, with growth set to really take off starting in 2024. It’s been almost five years since Tesla and STMicroelectronics threw down the gauntlet with SiC in the Model 3. Now, no one doubts the market pull for electric vehicles, but consumers are still clamoring for better range and faster charging. SiC devices are a... » read more

Wirebond IC Substrates: Challenges Ahead
By Prasad Dhond - 17 Mar, 2022 - Comments: 0

Substrate suppliers are slashing capacity allocated to wirebond IC substrates. We hear about "limited tenting capacity," "no support for EBS designs," and requests for "conversion to etchback" designs. What does all this mean? Let's start with "Line" and "Space." "Line" is the width of a trace on a substrate and "Space" is the distance between the two traces. For wirebond packages such a... » read more

Dissolving The Barriers In Multi-Substrate 3D-IC Assembly Design
By Tarek Ramadan - 24 Feb, 2022 - Comments: 0

Advanced packaging continues to promise improved form factor, cost, performance, and functionality compared to the traditional transistor scaling on SoCs. This is done by integrating multiple dies on top of a substrate (organic or silicon). Besides multiple dies, multiple substrates can typically exist in a 3D-IC assembly. In this case, the benefits of advanced packaging are taken to a whole ne... » read more

Collaboration And Advanced Substrates
By Katherine Derbyshire - 08 Oct, 2018 - Comments: 0

Discussions of semiconductor manufacturing tend to focus on CMOS logic and memory devices, sometimes to the exclusion of everything else. Discussions of silicon-on-insulator wafer markets focus on the needs of high performance logic. Lithography analysts emphasize high density memories. It’s easy to forget that real systems contain other devices, too. A modern smartphone probably supports ... » read more

Substrates for Semiconductor Packaging
By SEMI - 16 Jan, 2012 - Comments: 0

2012 Market Outlook for Laminate and Leadframe Materials By Jan Vardaman, TechSearch International, and Dan Tracy, SEMI Combined, laminate substrates and leadframes will represent an estimated US$ 13.3 billion market in 2011 and is forecasted to reach $14 billion in 2012. This is larger than the revenues for silicon wafers (including silicon-on-insulator wafers) of $10.3 billion in 2011 and... » read more

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