The Week In Review: Design


Tools & IP Cadence and National Instruments are teaming up with the aim of improving the semiconductor development and test process. The two companies are jointly working on common transistor models to ensure consistent simulation behavior between NI AWR Microwave Office circuit design software and the Cadence Spectre simulation platform. Cadence also launched the Virtuoso RF Solution for ... » read more

Analog Migration Equals Redesign


Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

First Look At USB 3.2


I’m super excited to write about and show to you the world’s first USB 3.2 demonstration. Go watch the video first and then read the rest. https://youtu.be/WPUvHeq_Sgs USB 3.2 hardware and software setup We implemented our USB 3.2 Device and Host in the HAPS-80 FPGA-Based hardware prototyping platform. The platforms use USB PHYs, which are implemented in a FinFET process node. ... » read more

CEO Outlook On Chip Industry


Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: What are the big changes ahead, and where do you see th... » read more

Measuring And Analyzing SoC Performance With Verdi Performance Analyzer


SoC performance is a key competitive advantage in the marketplace. The choice and configuration of SoC components—protocol IP and interconnects, is geared towards maximizing overall SoC performance. A case in point is the use of HBM (High Bandwidth Memory) technology and controllers. Currently in its third generation, HBM boasts high-performance while using less power in a substantially small... » read more

Blog Review: May 23


Cadence's Paul McLellan digs into the problems of test for 3D ICs s well as new approaches to cell-aware test, modular test and realistic IR drop at CDNLive EMEA. Mentor's Colin Walls shares four more embedded software tips, including always initializing a variable and when to use ++i instead of i++. Synopsys' Taylor Armerding points to a new way that phishing attacks could get around Mic... » read more

The Week In Review: Manufacturing


Fab tools and test VLSI Research released its annual "Customer Satisfaction Survey" and listed "THE BEST Suppliers" of 2018. VLSI Research received feedback from more than 94% of the chip market and 76% of subsystems customers for this year’s survey. Who are the winners? Applied Materials reported its second quarter results, along with its business outlook. Compared to the second quarter ... » read more

The Week In Review: Design


Tools & IP Synopsys uncorked ASIL B, C, and D ready versions of its DesignWare EV6x Embedded Vision Processors for automotive SoCs. An included Safety Enhancement Package provides hardware safety features, safety monitors, and lockstep capabilities for safety-critical designs. The processors integrate scalar, vector DSP, and CNN processing units for automotive systems that require deep lea... » read more

Blog Review: May 16


Synopsys' Eric Huang looks back at why the USB On-The-Go specification was revolutionary in getting devices talking to each other and how the shift to USB Type-C and Dual Mode means it isn't needed anymore. Mentor's Andrew Macleod examines four different shift-left methodologies and the benefits of each in the context of automotive and autonomous vehicle design. Cadence's Paul McLellan ch... » read more

Developing ASIL Ready SoCs For Self-Driving Cars


Artificial intelligence (AI) and deep learning using neural networks is a powerful technique for enabling advanced driver-assistance systems (ADAS) and greater autonomy in vehicles. As AI research moves rapidly, designers are facing tough competition to provide efficient, flexible, and scalable silicon and software to handle deep learning automotive applications like inferencing in embedded vis... » read more

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