Chip Industry Week In Review

By The SE Staff - 26 Jan, 2024 - Comments: 0

By Jesse Allen, Karen Heyman, and Susan Rambo UMC and Intel will collaborate on the development of a 12nm semiconductor process platform to address high-growth markets, such as mobile, communications infrastructure, and networking. Apple reportedly pushed back the launch date of its long-awaited electric vehicle and scaled back the self-driving features to L2 driver assistance, according ... » read more

Streamlining Failure Analysis Of Chips

By Anne Meixner - 10 Oct, 2023 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hak... » read more

Investigating The Ru/Ta Bilayer As An Alternative EUV Absorber To Mitigate Mask 3D Effects

By Technical Paper Link - 28 Aug, 2023 - Comments: 0

A technical paper titled “Ru/Ta bilayer approach to EUV mask absorbers: Experimental patterning and simulated imaging perspective” was published by researchers at KU Leuven and imec. Abstract: "The optical properties and geometry of EUV mask absorbers play an essential role in determining the imaging performance of a mask in EUV lithography. Imaging metrics, including Normalized Imag... » read more

Design of Selective Deposition Processes For Nanoscale Electronic Devices

By Technical Paper Link - 27 Jun, 2023 - Comments: 0

A technical paper titled “Quantified Uniformity and Selectivity of TiO2 Films in 45-nm Half Pitch Patterns Using Area-Selective Deposition Supercycles” was published by researchers at IMEC, North Carolina State University, and KU Leuven. Abstract: "Area-selective deposition (ASD) shows great promise for sub-10 nm manufacturing in nanoelectronics, but significant challenges remain in scali... » read more

Latest Discoveries in the Mechanics of 2D Materials

By Technical Paper Link - 31 May, 2023 - Comments: 0

A new technical paper titled "Recent advances in the mechanics of 2D materials" was published by researchers at McGill University, University of Science and Technology of China, and University of Illinois. "We review significant advances in the understanding of the elastic properties, in-plane failures, fatigue performance, interfacial shear/friction, and adhesion behavior of 2D materials. I... » read more

E-beam’s Role Grows For Detecting IC Defects

By Karen Heyman - 12 Jul, 2022 - Comments: 1

The perpetual march toward smaller features, coupled with growing demand for better reliability over longer chip lifetimes, has elevated inspection from a relatively obscure but necessary technology into one of the most critical tools in fab and packaging houses. For years, inspection had been framed as a battle between e-beam and optical microscopy. Increasingly, though, other types of insp... » read more

Manufacturing Bits: Dec. 28

By Mark LaPedus - 28 Dec, 2021 - Comments: 1

Measuring microdroplets The National Institute of Standards and Technology (NIST) has found a new way for microscopes to measure the volumes of microdroplets. Using this technique, NIST has measured the volume of individual droplets smaller than 100 trillionths of a liter with an uncertainty of less than 1%. That represents a tenfold improvement compared to previous measurements, according ... » read more

Semiconductor nanochannels in metallic carbon nanotubes by thermomechanical chirality alteration

By Technical Paper Link - 23 Dec, 2021 - Comments: 0

Abstract: "Carbon nanotubes have a helical structure wherein the chirality determines whether they are metallic or semiconducting. Using in situ transmission electron microscopy, we applied heating and mechanical strain to alter the local chirality and thereby control the electronic properties of individual single-wall carbon nanotubes. A transition trend toward a larger chiral angle region wa... » read more

Finding Defects With E-Beam Inspection

By Mark LaPedus - 20 Aug, 2020 - Comments: 0

Several companies are developing or shipping next-generation e-beam inspection systems in an effort to reduce defects in advanced logic and memory chips. Vendors are taking two approaches with these new e-beam inspection systems. One is a more traditional approach, which uses a single-beam e-beam system. Others, meanwhile, are developing newer multi-beam technology. Both approaches have thei... » read more

Speeding Up The R&D Metrology Process

By Mark LaPedus - 16 Jul, 2020 - Comments: 0

Several chipmakers are making some major changes in the characterization/metrology lab, adding more fab-like processes in this group to help speed up chip development times. The characterization/metrology lab, which is generally under the radar, is a group that works with the R&D organization and the fab. The characterization lab is involved in the early analytical work for next-generati... » read more

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