The Week In Review: Design/IoT


Standards Si2 is launching a new project to develop a new power modeling standard, focusing on estimation of power consumption more easily and more accurately throughout the design process, especially during the earliest stages. The approved specification will be contributed to the IEEE P2416 Standards Working Group for industry-wide distribution. IP Synopsys extended automotive safety... » read more

ReRAM Gains Steam


Resistive RAM appears to be gaining traction. Once considered a universal memory candidate—a replacement for DRAM, flash and SRAM—ReRAM is carving out a niche between DRAM and storage-class memory. Now the question is how large that niche ultimately becomes and whether other competing technologies rush into that space. [getkc id="94" kc_name="ReRAM"] (known alternately as RRAM), is a typ... » read more

More Choices, Less Certainty


The increasing cost of feature scaling is splintering the chip market, injecting uncertainty into a global supply chain that has been continually fine-tuned for decades. Those with deep enough resources and a clear need for density will likely follow Moore's Law, at least until 7nm. What comes after that will depend on a variety of factors ranging from available lithography—EUV, multi-bea... » read more

2.5D Creeps Into SoC Designs


A decade ago top chipmakers predicted that the next frontier for SoC architectures would be the z axis, adding a third dimension to improve throughput and performance, reduce congestion around memories, and reduce the amount of energy needed to drive signals. The obvious market for this was applications processors for mobile devices, and the first companies to jump on the stacked die bandwag... » read more

The Week In Review: Design/IoT


Legal A U.S. District Court invalidated three patents related to emulation, which were part of a patent infringement lawsuit filed by Synopsys against Mentor Graphics. The fourth patent will be reviewed by the U.S. Patent Trial and Appeal Board. Synopsys said it is evaluating an appeal and criticized the decision. "Synopsys strongly disagrees with the court's decision," said a Synopsys spokesp... » read more

Five Disruptive Test Technologies


For years, test has been a critical part of the IC manufacturing flow. Chipmakers, OSATs and the test houses buy the latest testers and design-for-test (DFT) software tools in the market and for good reason. A plethora of unwanted field returns is not acceptable in today’s market. The next wave of complex chips may require more test coverage and test times. That could translate into higher... » read more

Time To Revisit 2.5D And 3D


Chipmakers are reaching various and challenging inflection points. In logic, many IC makers face a daunting transition from planar transistors at 20nm to finFETs at 14nm. And on another front, the industry is nearing the memory bandwidth wall. So perhaps it’s time to look at new alternatives. In fact, chipmakers are taking a hard look, or re-examining, one alternative—stacked 2.5D/3D c... » read more

Bubble Gum and Scotch Tape


It’s always extremely interesting to talk with actual design engineers, trudging through the trenches of challenges like 3D design. Recently, I was able to speak with Robert Patti, chief technology officer, vice president of design engineering and a director at Tezzaron Semiconductor. The company has been putting 3D designs together for quite some time so I expected to hear that they are u... » read more