Back-End-of-Line (BEOL) Virtual Patterning With SEMulator3D

Interconnect requirements for the 22nm technology node and beyond, driven by shrinking FEOL geometry, push the limits of unit process tools for BEOL as well as FEOL. Lengthy and costly in-fab experiments are required to ensure that the integrated BEOL process meets local performance and cross-wafer uniformity requirements. Virtual fabrication experiments conducted with SEMulator3D can reduce th... » read more