Is The 2.5D Supply Chain Ready?

A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

Electronics Butterfly Effect

Everyone has heard of the butterfly effect where a small change in a non-linear system can result in large difference in an outcome. For the past 40 years, the electronics industry has approximated a linear system, fed primarily by Moore’s Law. The incremental changes available at each new process node have led us to make incremental changes and improvements in many aspects of the design, its... » read more

Partition Lines Growing Fuzzy

For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

Designing For Security

Stacked die may improve performance and lower power, but the use of [getkc id="203" kc_name="through-silicon vias"] (TSVs) could add new security risks. As IC structures go, the vertical component of these chip packages is both a boon and a bust. Three-dimensional geometries allow for much less complexity in design by stacking two-dimensional dies and interconnecting them in the third dimens... » read more

3D-IC Testing With The Mentor Graphics Tessent Platform

Three-dimensional stacked integrated circuits (3D-ICs) are composed of multiple stacked die, and are viewed as critical in helping the semiconductor industry keep pace with Moore's Law. Current integration and interconnect methods include wirebond and flip-chip and have been in production for some time. 3D chips connected via interposers are in production at Xilinx, Samsung, IBM, and Sematec... » read more

The Impact of 3D Packaging

With semiconductor packaging becoming a more crucial piece of the Moore’s Law roadmap, the industry is still sorting out the impact of a 3D design and packaging approach on design time, cost and power. 3D is now commonly used for high volume applications such as cell phones and SD cards, and is accomplished at the packaging step either through chip stacking or package-on-package (PoP) stac... » read more