tag: throughput

How To Boost ATE Power Supply Throughput
By Keysight - 26 Jul, 2023 - Comments: 0

The test engineer’s job is not an easy one. There is constant pressure to improve system throughput. This white paper will guide you on how to increase throughput to reduce costs. Increased throughput comes from faster programming and command processing times, built-in output sequencing, and arbitrary waveform capabilities. Faster testing speeds will enable more rigorous testing of devices, d... » read more

Working With RISC-V
By Ed Sperling - 17 Aug, 2021 - Comments: 0

RISC-V is coming on strong, but working with this open-source processor core isn't as simple as plugging in a commercial piece of IP. Zdenek Prikryl, CTO at Codasip, talks about utilizing hypervisors and open source tools and extensions to the RISC-V instruction set architecture, where design teams can run into problems, what will change as the architecture becomes more mature, the difference b... » read more

Extremely Large Exposure Field w/Fine Resolution Lithography Tech To Enable Next-Gen Panel Level Advanced Packaging
By Technical Paper Link - 05 Aug, 2021 - Comments: 0

Abstract—"The growing demand for heterogeneous integration is driven by the 5G market that includes smartphones, data centers, servers, HPC, AI and IoT applications. Next-generation packaging technologies require tighter overlay to accommodate a larger package size with finer pitch chip interconnects on large format flexible panels. Heterogeneous integration enables next-generation device per... » read more

Faster Inferencing At The Edge
By Ed Sperling - 09 Nov, 2020 - Comments: 0

Cheng Wang, senior vice president of engineering at Flex Logix, talks about inferencing at the edge, what are some of the main considerations in designing and choosing an inferencing chip, why programmability and modularity are important, and how hardware-software co-design with algorithms can improve performance and power. » read more

AI Inference Acceleration
By Ed Sperling - 14 Sep, 2020 - Comments: 0

Geoff Tate, CEO of Flex Logix, talks about considerations in choosing an AI inference accelerator, how that fits in with other processing elements on a chip, what tradeoffs are involved with reducing latency, and what considerations are the most important. » read more

HBM Issues In AI Systems
By Brian Bailey - 16 Mar, 2020 - Comments: 0

All systems face limitations, and as one limitation is removed, another is revealed that had remained hidden. It is highly likely that this game of Whac-A-Mole will play out in AI systems that employ high-bandwidth memory (HBM). Most systems are limited by memory bandwidth. Compute systems in general have maintained an increase in memory interface performance that barely matches the gains in... » read more

Making Sense Of ML Metrics
By Ed Sperling - 16 Oct, 2019 - Comments: 0

Steve Roddy, vice president of products for Arm’s Machine Learning Group, talks with Semiconductor Engineering about what different metrics actually mean, and why they can vary by individual applications and use cases. » read more

Why DRAM Won’t Go Away
By Ed Sperling - 18 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to talk about DRAM's future with Frank Ferro, senior director of product management at Rambus; Marc Greenberg, group director for product marketing at Cadence; Graham Allan, senior product marketing manager for DDR PHYs at Synopsys; and Tien Shiah, senior manager for memory marketing at Samsung Electronics. What follows are excerpts of that conversation. Part ... » read more

DRAM Tradeoffs: Speed Vs. Energy
By Ed Sperling - 31 Jul, 2019 - Comments: 1

Semiconductor Engineering sat down to talk about new DRAM options and considerations with Frank Ferro, senior director of product management at Rambus; Marc Greenberg, group director for product marketing at Cadence; Graham Allan, senior product marketing manager for DDR PHYs at Synopsys; and Tien Shiah, senior manager for memory marketing at Samsung Electronics. What follows are excerpts of th... » read more

Inferencing Efficiency
By Ed Sperling - 11 Jul, 2019 - Comments: 0

Geoff Tate, CEO of Flex Logix, talks with Semiconductor Engineering about how to measure efficiency in inferencing chips, how to achieve the most throughput for the lowest cost, and what the benchmarks really show. » read more

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