Transient Current Crunch

When Intel talks, people listen. So when Intel executive VP Dadi Perlmutter said in a keynote at ISSCC in 2012 that transient power noise was one of the most limiting aspects of the chip design process—and how the package and the board inductance are limiting how low they can take the supply voltage—it showed the gravity of the challenge of effectively managing transient power. Transient po... » read more