Chip Industry’s Technical Paper Roundup: August 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=39 /] More Reading Technical Paper Library home » read more

III–V Laser Grown on a Patterned Si Photonics Platform With Light Coupling Into Passive SiN Waveguides


A technical paper titled “Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides” was published by researchers at University of Montpellier, Tyndall National Institute, Munster Technological University and Polytechnic University of Bari. Abstract: "Silicon (Si) photonics has recently... » read more

Research Bits: April 4


Wet-like plasma etching Researchers from Nagoya University and Hitachi developed a new etch method called wet-like plasma etching that combines the selectivity of wet etching with the controllability of dry etching. The researchers say the technique will make it possible to etch complex structures such as metal carbides consisting of titanium (Ti) and aluminum (Al), such as TiC or TiAlC, wh... » read more

Chip Industry’s Technical Paper Roundup: Mar. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=89 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Integrating MEMS with Standardized Silicon Photonics Technology


A new technical paper titled "Integrated silicon photonic MEMS" was published by researchers at EPFL, University of Sydney, CSEM, KTH Royal Institute of Technology, Ghent University, Imec, and Tyndall National Institute. Abstract Excerpt "Here, we introduce a silicon photonic MEMS platform consisting of high-performance nano-opto-electromechanical devices fully integrated alongside standar... » read more

Chip Industry’s Technical Paper Roundup: Oct 25


New technical papers added to Semiconductor Engineering’s library this week. [table id=59 /] » read more

On-chip 2D/3D Photonics Integration Solution Using Deposited Polycrystalline Silicon for Optical Interconnects Applications


A new technical paper titled "Polycrystalline silicon PhC cavities for CMOS on-chip integration" was published by researchers at Tyndall National Institute, Munster Technological University, and Université Grenoble Alpes, CEA, LETI. "In this work, we present an on-chip 2D and 3D photonics integration solution compatible with Front End of Line integration (FEOL) using deposited polycrystalli... » read more

Manufacturing Bits: Sept. 12


Failure analysis for 2.5D/3D chips Imec has developed a new failure analysis method to localize interconnection failures in 2.5D/3D stack die with through-silicon vias (TSVs). This technique is called LICA, which stands for light-induced capacitance alteration. It addresses the reliability issues for 2.5D/3D devices in a non-destructive and cost-effective manner at the wafer level. For s... » read more

Manufacturing Bits: March 8


5G mmWave consortium Amid a slowdown in the cell phone business, the market is heating up for perhaps the next big thing in wireless—5th generation mobile networks or 5G. Carriers, chipmakers and telecom equipment vendors are all rushing to get a piece of the action in 5G, which is the follow-on to the current wireless standard known as 4G or long-term evolution (LTE). Radio-frequency (RF... » read more