Chip Industry’s Technical Paper Roundup: October 31


New technical papers added to Semiconductor Engineering’s library this week. [table id=159 /] More Reading Technical Paper Library home » read more

Optimization Of The Interface Between The PD And The AFE In High-Speed, High-Density Optical Receivers


A technical paper titled “Optimizing the Photodetector/Analog Front-End Interface in Optical Communication Receivers” was published by researchers at University of Toronto. Abstract: "This article addresses the optimization of the interface between the photodetector (PD) and the analog front-end in high-speed, high-density optical communication receivers. Specifically, the article focuses... » read more

Chip Industry’s Technical Paper Roundup: July 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=119 /] More Reading Technical Paper Library home » read more

A Flip-Chip, Co-Packaged With Photodiode, High-speed TIA in 16nm FinFET CMOS


A technical paper titled "A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes" was published by researchers at University of Toronto, Alphawave IP, and Huawei Technologies Canada. Abstract: "A flip-chip co-packaged linear transimpedance amplifier (TIA) in 16-nm fin field effect transistor (FinFET) CMOS demonstrating 112-Gb/s four-level pulse-amplitude... » read more

Chip Industry’s Technical Paper Roundup: May 2


New technical papers recently added to Semiconductor Engineering’s library: [table id=95 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Overview Of EV Charging Infrastructure, The Role of Power Electronics, And Charging Technologies


A technical paper titled "Charging Infrastructure and Grid Integration for Electromobility" was published by researchers at Universidad de los Andes, University of Cambridge, Duke University, Universidad Técnica Federico Santa Maria, University of Toronto, TU Delft, and University of Florence. Abstract "Electric vehicle (EV) charging infrastructure will play a critical role in decarbonizat... » read more

Chip Industry’s Technical Paper Roundup: Mar. 21


New technical papers recently added to Semiconductor Engineering’s library: [table id=88 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

FPGA-based Infrastructure, With RISC-V Prototype, to Enable Implementation & Evaluation of Cross-Layer Techniques in Real HW (Best Paper Award)


A technical paper titled "MetaSys: A Practical Open-Source Metadata Management System to Implement and Evaluate Cross-Layer Optimizations" was published by researchers at University of Toronto, ETH Zurich, and Carnegie Mellon University. This paper won the Best Paper Award at the HiPEAC 2023 conference. Abstract: "This paper introduces the first open-source FPGA-based infrastructure, MetaSy... » read more

Chip Industry’s Technical Paper Roundup: Oct 25


New technical papers added to Semiconductor Engineering’s library this week. [table id=59 /] » read more

Redesigning Core and Cache Hierarchy For A General-Purpose Monolithic 3D System


A technical paper titled "RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory" was published by researchers at ETH Zürich, KMUTNB, NTUA, and University of Toronto. Abstract: "Recent nano-technological advances enable the Monolithic 3D (M3D) integration of multiple memory and logic layers in a single chip with fine-graine... » read more

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