Implementing analog and digital parts of a flow leads to excess iteration and prolonged design cycle time. Here’s what’s changing.
By Ann Steffora Mutschler
We are on the cusp of the mixed-signal era. Traditional mixed-signal design environments, in which analog and digital parts are implemented separately, no longer are sufficient. They lead to excess iteration and prolonged design cycle time. Today’s mixed-signal designs require a new approach that enables design teams to be as efficient as possible productivity-wise, not to mention encouraging close collaboration among analog and digital designers.
Driving this shift are both technology and business trends. One such technology trend is the rise of digital-assisted analog content, explained Qi Wang is group director for solutions marketing at Cadence Design Systems. “When you create an analog IP, nowadays for time-to-market and for the cost you want to make the analog more configurable, more controllable, or maybe programmable or auto-calibrating (to avoid advanced node variations). You want all that flexibility. All of those requirements are related to the control or the reprogramming of the analog features, but it is easier to do in digital. The core function may still be analog, but those additional things to make the analog fancier or more robust are done by digital.”
In this kind of circuit design style, there will be a lot of handshake between the digital part, the control part and the analog core engine part. Therefore, by nature, it is very hard to separate which one is digital and which one is analog because of the inherent communication between the two function blocks, he said. “You need a way to consider them, to design them the same, to verify them the same and implement them in the same environment.”
Low-power and power awareness also play a significant role here because analog transistors are much bigger than the digital ones, and by definition they consume more power. Certain analog circuit can be converted to digital versions to save a non-trivial amount of power. In one experiment, Wang noted, Cadence compared the 100% digital and 100% analog implementations of an IP and found that the digital version used 50% as much power as the analog version.
“For whatever reason—for power, or for easier migration to advanced nodes—the more of your circuitry that is in digital the easier it will be to migrate to 28nm to 20nm and the easier it will be to predict the power consumption because of the standard cell methodology,” he said. “I think we’re going to see more and more mixed-signal designs from almost all applications—automotive, medical, wireless—there’s no doubt about that. On the business side, people want to differentiate themselves from their traditional design style and be more competitive. On the technical side, you want lower power and more functionality.
Ed Lechner, director of product marketing for custom design at Synopsys, has observed the same trend. As designs have gone down into smaller and smaller nodes, engineers say they need to be able to design and analyze their mixed-signal circuits together. “We see this almost at every chip. What traditionally was digital SoCs essentially now becomes mixed-signal SoCs.”
From an implementation perspective, mixed-signal designs contain a number of peripherals to interface to the outside world—things like USB 3, PCI Express, SATA 3, DDR3. “Almost every digital chip has these blocks on them, and interfacing them to the digital logic is where a lot of the challenges are occurring right now,” he said.
“Typically, the peer analog—really high speed, sensitive stuff—still tends to be done a little bit separately. But where that PHY has to interface to the logic, which is done in the place and route system, that’s where the challenges are because the signals have to be very well matched in terms of length, resistance and capacitance. The traditional place and route system can’t do that. It’s geared towards routing,” Lechner noted.
Mike Gianfagna, vice president of marketing at Atrenta, agreed a lot of the challenges around mixed-signal design show up in the interface between the digital subsystems and the mixed-signal subsystems. “Correct hookup and appropriate level shifting are just two examples.” He noted that customers are requesting extensions to existing tools to deal with this.
Lechner pointed out that there are implementation systems with integrated routers, optimized to route millions of signal nets. But when it comes to doing these very specialized ‘special nets’ (or analog nets or mixed-signal nets), the routers aren’t optimized for that. “Then, you need to come over into a custom-type methodology, which still understands the digital stuff, where everything is placed.”
What it boils down to is that all of these are specialized routing applications that can be done in an analog environment, but analog and digital environments need to be very well connected. Today, some EDA providers are bolting tools together so that they will interact at the application level, beyond database compatibility to having an understanding of what the other tool does and how it handles certain circumstances. That way, when it comes back over to its respective domain, it doesn’t rip up and re-route something you just did meticulously with an analog custom router.
However, more than just implementation, verification of mixed-signal design has created huge challenges. Wang noted that often when mixed-signal design is discussed, “people think we’re talking about implementation, but verification is an even bigger challenge. The key thing is that, at the bare minimum, you can still do analog and digital separately and then hook them together. But to verify the functions, how can you get away with not thinking about the analog part? There’s much more need to drive mixed-signal SoC level verification together than the implementation part.”
There is a performance gap between analog and digital verification, which is the result of digital verification being based on events—where time and values are discrete, whereas analog verification is based on time steps. The answer, according to Cadence, is real number modeling, whereby analog block operations are modeled as discrete real data. This allows digital verification methods to be applied to analog and mixed signal designs.
Real number modeling and other technologies are in the works or slowly trickling into design flows. Midsize European companies that play into the automotive and medical markets, which are inherently mixed-signal, are among the early adopters to take advantage of power and time-to-market benefits.