Photonic analysis; DDR4 SDRAM IP; SHA-3 core; 64-bit ARMv8-A RTOS support; power consumption survey.
Synopsys updated RSoft, its software for the design of photonic devices. The updates include increased integration with the company’s TCAD products as well as faster simulations and additional ways to customize photonic device analysis.
Mentor Graphics, Northwest Logic, and Krivi Semiconductor collaborated on DDR4 SDRAM IP to integrate design and verification into a single flow. Northwest Logic provided memory controller design IP for use in both ASICs and FPGAs along with a comprehensive set of add-on cores, while Krivi Semiconductor added DDR PHY with DFI compatibility. Mentor Graphics supplied the verification IP tool suite for memory controllers and interfaces.
Beyond Semiconductor and CAST launched a new hardware implementation for Secure Hash Algorithm-3 (SHA-3). The IP core offers throughput of up to 48 Mbits/MHz and silicon area as small as 28K gates.
Mentor Graphics’ Nucleus real-time operating system added support for the 64-bit ARMv8-A architecture, targeting high-performance, real-time applications in automotive, industrial, medical, mil/aero, and networking systems. The RTOS also enables the ARMv8-A aarch32 (32-bit) execution mode that allows users to run legacy 32-bit code on 64-bit SoCs. The initial reference implementation is for NXP’s QorIQ LS2085A-RDB Reference Design Board.
STMicroelectronics licensed Arteris’ FlexNoC interconnect IP along with the FlexNoC Resilience Package for hardware reliability and functional safety features, citing the ability of the package to meet desired ISO 26262 ASIL levels.
Xilinx inked a license agreement with Rambus for the company’s memory controller, SerDes, and security technologies. Additionally, Rambus will explore the use of Xilinx FPGAs in its Smart Data Acceleration research program.
Concerned about the impact of chip power consumption on sustainability? An industry survey regarding the best practices for on-chip power management is being conducted by Sonics and Semico Research. Participation takes approximately 15 minutes.