The Week In Review: Design/IoT

Cadence unveils RTL power analysis tool; Synopsys’ USB 3.1 test; NXP automotive Ethernet options; deals for Arteris and Cadence; UL teams up with Synopsys on cybersecurity.

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Tools

Cadence unveiled Joules, its new RTL power analysis solution. The tool performs design synthesis using a new integrated prototype mode of Cadence’s Genus Synthesis product, including physically aware clock tree and datapath buffering, and enabling accurate RTL power estimation.

IP

Synopsys and ASMedia completed a successful interoperability demonstration of Synopsys’ USB 3.1 Device Controller IP with ASMedia’s USB-IF certified USB 3.1 Host Controller IC, showing 10 Gbps USB 3.1 data transfers between them.

Chips

NXP released a portfolio for automotive Ethernet built on BroadR-Reach, an automotive standard with the aim to make consumer-level Ethernet capable of meeting the automotive industry’s requirements. The portfolio includes Ethernet transceivers and switches.

Deals

Montage Technology, maker of digital set-top box SoCs, licensed Arteris’ NoC IP for use in its next generation chipsets.

Realtek implemented Cadence’s special-purpose verification computing platform for development and verification of a recent SoC design. Realtek cited up to 250X faster acceleration versus its previous methodology.

UL teamed up with Synopsys to develop a Cybersecurity Assurance Program. The project, began with Codenomicon prior to its acquisition by Synopsys, focuses on creating a baseline structure for cybersecurity assurance and will be customized for specific industry segments. The program will initially focus on medical devices and industrial control systems, with planned expansion into other vertical markets.