Would you like a comprehensive power model? Of course you would. You’re not alone.
Ask any design engineer if they want a power model, and you can guess the answer. As far as what they want to use it for, the answer will vary.
When I asked Jem Davies, ARM Fellow, if OEM engineering teams want a comprehensive power model, he said, “Ideally, yes. Perfectly ideally, what they would like to have from us is a model of each individual block of our IP which plugs together in a seamless way so that he can model his SoC, and it would be power accurate, performance accurate and of course it would run at full speed.”
But that type of model starts to sound in the realm of leprechauns and unicorns.
In the real world, the tradeoffs with power models are the obvious ones: it is not completely accurate, and it runs more slowly than it would like, it doesn’t always fit together seamlessly, and there certain things that can be modeled and certain things that can’t. He explained, “For example in graphics, you feed this incredibly complicated program through it, which runs for a second or so and generates these incredibly beautiful pictures. That’s fine but if you run that through a model you might be here for three weeks. So we talk about some indicative frame of content.”
Engineering teams then run benchmarks to get some frame of reference and worst power performance. “If you want 60 frames per second of that, it is going to cost you this power,” Davies said. “Then you add up a whole bunch of things like that together and you get the number. You say, ‘sorry that doesn’t work,’ or ‘you’re only going to get 60 frames per second,’ or maybe you’re only going to get 30 frames per second or actually you can’t do it all on four Cortex-A57s flat out. Maybe you’re going to have to run this on four Cortex-A53s, maybe you’re going to have to shut some of the cores down, maybe you can’t afford a 12 core CPU, maybe you can only afford a 3-core GPU or whatever — the whole bunch of interesting tradeoffs get to be made here.”
He reminded ARM has certain techniques including big.LITTLE, Intelligent Power Allocation and Energy Aware Scheduling, to help with all of this.
And the work in standards organizations on power modeling is underway, so hang in there, Engineer.
Interestingly, Davies also mentioned that in the context of IP subsystems, ARM is often asked why it is making subsystems at all. “Isn’t that the job of our partners; isn’t that their special value add? To which the answer is of course, yes, that is their special value add and hopefully, particularly our famous leading edge partners they’ll do it better than us.”
However, he added, “it is necessary for us to most of the work of making these subsystems in order to eat our own dog food. [Customers] have an expectation that if they buy one of these, one of these and one of these, and connect it up — it’s all going to work seamlessly and efficiently. They’re going to be mightily cross if they find out that isn’t true, so we’re going to have to do a whole bunch of work just to make their assumptions come true, and actually going the last path and productizing these subsystems.”