January 2010 - Page 2 of 2 - Semiconductor Engineering


Experts At The Table: The Reliability Factor


Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high-reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: As we push to the next process nod... » read more

Journey To The Center Of The Ecosystem


From the outside it looks like business as usual, but the race for board seats on the GSA has become particularly competitive this year. GSA originally was created as an organization for fabless companies, but you wouldn’t know that looking at its membership roster. It has evolved into a who’s who of the entire semiconductor supply chain, including everyone from foundries like TSMC and... » read more

Start Your Engines


For all intents and purposes, the downturn appears to be over. Like the California drought, it takes time to refill the reservoirs, but at least the economic base level is rising. All of the leading indicators in the semiconductor market point upward and to the right. iSuppli reports that distributor inventories are below average, which is particularly interesting given that the electronic... » read more

Verifying Low-Power Designs


By Ed Sperling Power islands and multiple voltages used to be reserved for cell phone and process companies, but as more companies move to 65nm and 45nm process nodes these approaches to saving power—particularly in chips with multiple cores—are becoming mainstream. The problem isn’t in the architecture of the chips, although that certainly brings its own set of challenges. More and m... » read more

The Power Of 3D


By Cheryl Ajluni Much to the dismay of anyone who recently splurged on a new Blu-ray disk player or flat-panel HDTV, 3D stereoscopic content has become the talk of the town or, in this case, the 2010 Consumer Electronics Show. Sure, we’ve been down this road before. After all, 3D is nothing new. But it now appears ready to explode into the home in the form of 3D television (Figure 1). Bol... » read more

Low-Power Architectures Go Mainstream


By Pallab Chatterjee Until recently, low power engineering has been defined by the automated use of EDA tools in the design flow to help cut back on peak dynamic power. The new generation of mobile and video products has forced a change in that methodology. There are two other fast rising architectural approaches. The first is multicore, which is prevalent in new product introductions fr... » read more

Combining Power And Synthesis


By Ann Steffora Mutschler Each passing design node shrinks electronic designs ever smaller and more complex, which has made power management a critical design priority – even in the synthesis step in the design flow. Synthesis has always been an integral part of the design process, particularly at the RTL level. But as chip design has become more complicated, the need to raise the pro... » read more

The Formal Approach


By Bhanu Kapoor Power domains are required in the design due to stringent active and standby power specifications. Depending upon various modes of operation of a chip, power domains allow parts of a chip to be powered on/off independently from the rest of the chip. This has become common in all handheld and portable applications where stringent power requirements are a major competitive concer... » read more

Experts At The Table: The Reliability Factor


By Ed Sperling Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: Do chips become ... » read more

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